High speed serial input/output (I/O) time and frequency characterization with correlation method

High Speed serial data bus is developed to support data transfer between the CPU and peripherals on the PC motherboard in future generation applications. At high speed with multi-gigabit, impedance mismatch between the CPU and peripherals becomes critical and limits the possible maximum throughput....

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Main Author:	Neoh, Chai Chen
Format:	Thesis
Language:	English
Published:	2009
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/12362/1/NeohChaiChenMFKE2009.pdf
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spelling	my-utm-ep.123622018-06-26T07:50:18Z High speed serial input/output (I/O) time and frequency characterization with correlation method 2009 Neoh, Chai Chen TK Electrical engineering. Electronics Nuclear engineering High Speed serial data bus is developed to support data transfer between the CPU and peripherals on the PC motherboard in future generation applications. At high speed with multi-gigabit, impedance mismatch between the CPU and peripherals becomes critical and limits the possible maximum throughput. This effect can be modeled as a convolution process where the I/O bus behaves as a linear time invariant system that is defined by a channel impulse and frequency response. Since there are variations in the characteristic of the motherboards due to the fabrication and assembly process, it is desired to estimate the impulse response and frequency response of the High Speed I/O bus. Impulse response and frequency response can be used to gate the capability of the motherboard. Correlation method is used to find out channel impulse and frequency response. In order to evaluate the capability of the correlation method under actual manufacturing environment, the evaluation was performed on data collected from actual production test and MATLAB tools will be used for post processing. PCI Express Gen 1 is used to generate high speed data at 2.5Gbps. The results show that there is no difference auto-correlation and cross-correlation in measurement data except the overshoot amplitude and time delay in due to the internal built in equalization technique. 2009 Thesis http://eprints.utm.my/id/eprint/12362/ http://eprints.utm.my/id/eprint/12362/1/NeohChaiChenMFKE2009.pdf application/pdf en public masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering 1. International Technology Roadmap for Semiconductors, Test and Test Equipment (2003), Page(s):18-20. 2. John D. Carpinelli (2001). Computer System Organization and Architecture. Page(s): 141. Addison Wesley. 3. Huang Jimmy Huat Since, and Lee Chan Kim, Kuan Chin Lee (2008). Signal Integrity Analysis and Validation of GHz I/O Interface on Wire Bond Ball Grid Array Technology Package. Intel Microelectronic (M) Sdn. Bhd 4. Maynard Falconer (2004). Bus Design Boot Camp. Intel Corp. 5. AB AL- HADI AB RAHMAN, Very Large Scale Integration Design and Synthesis of Adaptive Equalizer. Master’s Thesis. Universiti Teknologi Malaysia; 2007 6. Hewlett Packard, S-parameters Technique, Test and Measurement Application Notes 95-1 7. Jimmy Huang Huat Since. Time Frequency Characterization of the High Speed I/O Data Bus, Master’s Thesis. Universiti Teknologi Malaysia; 2007 8. Prof Ahmad Zuri (2007). Advanced DSP Chapter 4: Random Signal Processing, UTM 9. Farhad Zarkeshvari, Peter Noel, and Tad Kwasniewski (2000). High Speed Serial I/O Trends, Standards and Techniques, Department of Electronics, Carleton University 10. PCI Express Base Specification Revision 2.0 (2006), PCI Express 11. Youngsik Hur, Moonkyun Maeng, Carl Chun, Franklin Bien, Hyoungsoo Kim, Soumya Chandramouli, Edward Gebara and Joy Laskar, Equalization and Near-End Crosstalk (NEXT) Noise Cancellation for 20-Gb/s 4 PAM Backplane Serial I/O Interconnections. 12. Henrik Dredriksson and Christer Svensson (2003), 3-Gb/s, Single-ended AdaptiveEqualization of Bidirectional Data over a Multi-drop Bus, Electronics Devices Dept. of Electrical Engineering, Linkoping University. 13. Ove Edfors. Lecture no:8 Equalization Department of Electronic 14. Prof Ahmad Zuri (2007). Application of DSP and Digital Communication Principles in High Speed Data Bus Design and Implementation. Digital Signal Processing Lab Faculty of Electrical Engineering UTM 15. Girish Ramesh. Design of De-Emphasis and Equalization Circuits for Gigabit Serial Interconnects. Ansoft Corporation 16. Erdem Motoglu, Moises Cases, Daniel N. de Araujo, Nam Pham, Pham W Metty, *Kent Dramstad, Design and Verification of Multi-Gigabit Transmission Channel Using Equalization Technique. IBM Corporation
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Neoh, Chai Chen High speed serial input/output (I/O) time and frequency characterization with correlation method
description	High Speed serial data bus is developed to support data transfer between the CPU and peripherals on the PC motherboard in future generation applications. At high speed with multi-gigabit, impedance mismatch between the CPU and peripherals becomes critical and limits the possible maximum throughput. This effect can be modeled as a convolution process where the I/O bus behaves as a linear time invariant system that is defined by a channel impulse and frequency response. Since there are variations in the characteristic of the motherboards due to the fabrication and assembly process, it is desired to estimate the impulse response and frequency response of the High Speed I/O bus. Impulse response and frequency response can be used to gate the capability of the motherboard. Correlation method is used to find out channel impulse and frequency response. In order to evaluate the capability of the correlation method under actual manufacturing environment, the evaluation was performed on data collected from actual production test and MATLAB tools will be used for post processing. PCI Express Gen 1 is used to generate high speed data at 2.5Gbps. The results show that there is no difference auto-correlation and cross-correlation in measurement data except the overshoot amplitude and time delay in due to the internal built in equalization technique.
format	Thesis
qualification_level	Master's degree
author	Neoh, Chai Chen
author_facet	Neoh, Chai Chen
author_sort	Neoh, Chai Chen
title	High speed serial input/output (I/O) time and frequency characterization with correlation method
title_short	High speed serial input/output (I/O) time and frequency characterization with correlation method
title_full	High speed serial input/output (I/O) time and frequency characterization with correlation method
title_fullStr	High speed serial input/output (I/O) time and frequency characterization with correlation method
title_full_unstemmed	High speed serial input/output (I/O) time and frequency characterization with correlation method
title_sort	high speed serial input/output (i/o) time and frequency characterization with correlation method
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2009
url	http://eprints.utm.my/id/eprint/12362/1/NeohChaiChenMFKE2009.pdf
_version_	1747814928797925376

High speed serial input/output (I/O) time and frequency characterization with correlation method

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