SoC test scheduling algorithm using enhanced rectangle packing

The System-on-Chip (SoC) test scheduling algorithm based on rectangle packing was previously proposed by Iyengar et al. in 2002. This method had been proven its effectiveness on SoC test application time optimization. Xia et al. further improve the flexibility of rectangle packing approach by implem...

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Main Author:	Lee, Siaw Chen
Format:	Thesis
Language:	English
Published:	2009
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/18548/1/LeeSiawChenMFKE2009.pdf
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id	my-utm-ep.18548
record_format	uketd_dc
spelling	my-utm-ep.185482018-06-25T09:02:12Z SoC test scheduling algorithm using enhanced rectangle packing 2009 Lee, Siaw Chen TK Electrical engineering. Electronics Nuclear engineering The System-on-Chip (SoC) test scheduling algorithm based on rectangle packing was previously proposed by Iyengar et al. in 2002. This method had been proven its effectiveness on SoC test application time optimization. Xia et al. further improve the flexibility of rectangle packing approach by implementing the distributed rectangle binpacking approach which allows core wrapper pins from one particular core to be assigned to non-consecutive SoC Test Access mechanism (TAM) through vertical partitioning of core rectangles. However, the above mentioned methods still result in significant idling time. Therefore, this project proposes a new scheduling method, namely the enhanced rectangle packing, which is an extension to the original rectangle packing and distributed rectangle packing. The proposed algorithm horizontally partitioned the core rectangles to obtain rectangles of smaller size for idling time reduction, which in turn successfully shorten the total test application time for a SoC. Experimental results conducted on ITC’02 SoC test benchmark circuits show the effectiveness of the enhanced rectangle packing algorithm in reducing SoC test application time for up to 6% in maximum. 2009 Thesis http://eprints.utm.my/id/eprint/18548/ http://eprints.utm.my/id/eprint/18548/1/LeeSiawChenMFKE2009.pdf application/pdf en public masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Lee, Siaw Chen SoC test scheduling algorithm using enhanced rectangle packing
description	The System-on-Chip (SoC) test scheduling algorithm based on rectangle packing was previously proposed by Iyengar et al. in 2002. This method had been proven its effectiveness on SoC test application time optimization. Xia et al. further improve the flexibility of rectangle packing approach by implementing the distributed rectangle binpacking approach which allows core wrapper pins from one particular core to be assigned to non-consecutive SoC Test Access mechanism (TAM) through vertical partitioning of core rectangles. However, the above mentioned methods still result in significant idling time. Therefore, this project proposes a new scheduling method, namely the enhanced rectangle packing, which is an extension to the original rectangle packing and distributed rectangle packing. The proposed algorithm horizontally partitioned the core rectangles to obtain rectangles of smaller size for idling time reduction, which in turn successfully shorten the total test application time for a SoC. Experimental results conducted on ITC’02 SoC test benchmark circuits show the effectiveness of the enhanced rectangle packing algorithm in reducing SoC test application time for up to 6% in maximum.
format	Thesis
qualification_level	Master's degree
author	Lee, Siaw Chen
author_facet	Lee, Siaw Chen
author_sort	Lee, Siaw Chen
title	SoC test scheduling algorithm using enhanced rectangle packing
title_short	SoC test scheduling algorithm using enhanced rectangle packing
title_full	SoC test scheduling algorithm using enhanced rectangle packing
title_fullStr	SoC test scheduling algorithm using enhanced rectangle packing
title_full_unstemmed	SoC test scheduling algorithm using enhanced rectangle packing
title_sort	soc test scheduling algorithm using enhanced rectangle packing
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2009
url	http://eprints.utm.my/id/eprint/18548/1/LeeSiawChenMFKE2009.pdf
_version_	1747815301658968064

SoC test scheduling algorithm using enhanced rectangle packing

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