Testing and debugging mechanisms for network-on-chip

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主要作者: Rajagopal , R. Selvakumar
格式: Thesis
出版: 2009
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id my-utm-ep.18584
record_format uketd_dc
spelling my-utm-ep.185842011-11-18T04:35:31Z Testing and debugging mechanisms for network-on-chip 2009-00 Rajagopal , R. Selvakumar TK Electrical engineering. Electronics Nuclear engineering 2009-00 Thesis http://eprints.utm.my/id/eprint/18584/ masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution Universiti Teknologi Malaysia
collection UTM Institutional Repository
topic TK Electrical engineering
Electronics Nuclear engineering
spellingShingle TK Electrical engineering
Electronics Nuclear engineering
Rajagopal , R. Selvakumar
Testing and debugging mechanisms for network-on-chip
description
format Thesis
qualification_level Master's degree
author Rajagopal , R. Selvakumar
author_facet Rajagopal , R. Selvakumar
author_sort Rajagopal , R. Selvakumar
title Testing and debugging mechanisms for network-on-chip
title_short Testing and debugging mechanisms for network-on-chip
title_full Testing and debugging mechanisms for network-on-chip
title_fullStr Testing and debugging mechanisms for network-on-chip
title_full_unstemmed Testing and debugging mechanisms for network-on-chip
title_sort testing and debugging mechanisms for network-on-chip
granting_institution Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department Faculty of Electrical Engineering
publishDate 2009
_version_ 1747815310912651264