Field programmable gate array implementation for fault detection in a power transmission lines

Field programmable gate array implementation for fault detection in a power transmission lines

The aim of this thesis is to design an FPGA implementation for faults detection in power transmission lines. A prototype of DE2 board training kit with Cyclone IIEP2C35F672C6 FPGA processor is used to perform the analysis and obtain experiment results. Failure to protect the electrical power system...

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書目詳細資料
主要作者:	Peh, Kok Guan
格式:	Thesis
出版:	2010
主題:	TK Electrical engineering Electronics Nuclear engineering
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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