Floorplaning methodology for network on chip
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2012
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my-utm-ep.320972013-06-12T07:54:06Z Floorplaning methodology for network on chip 2012-00 Chia, Ie Chen Unspecified 2012-00 Thesis http://eprints.utm.my/id/eprint/32097/ masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering |
| institution |
Universiti Teknologi Malaysia |
| collection |
UTM Institutional Repository |
| topic |
Unspecified |
| spellingShingle |
Unspecified Chia, Ie Chen Floorplaning methodology for network on chip |
| description |
|
| format |
Thesis |
| qualification_level |
Master's degree |
| author |
Chia, Ie Chen |
| author_facet |
Chia, Ie Chen |
| author_sort |
Chia, Ie Chen |
| title |
Floorplaning methodology for network on chip |
| title_short |
Floorplaning methodology for network on chip |
| title_full |
Floorplaning methodology for network on chip |
| title_fullStr |
Floorplaning methodology for network on chip |
| title_full_unstemmed |
Floorplaning methodology for network on chip |
| title_sort |
floorplaning methodology for network on chip |
| granting_institution |
Universiti Teknologi Malaysia, Faculty of Electrical Engineering |
| granting_department |
Faculty of Electrical Engineering |
| publishDate |
2012 |
| _version_ |
1747815920643866624 |