Real time digital alarm clock with microprogrammed control unit
Digital system design based on Field Programmable Logic Array (FPGA) is a method of choice for digital product development as it provides faster time to realize. Design software such as Xilinx ISE allows the designer to design and implement a new system on FPGA chip. Behavior of FPGA which can be de...
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| Format: | Thesis |
| Language: | English |
| Published: |
2010
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| Online Access: | http://eprints.utm.my/id/eprint/32471/5/MohamadYusofIdroasPFKM2012.pdf |
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| Summary: | Digital system design based on Field Programmable Logic Array (FPGA) is a method of choice for digital product development as it provides faster time to realize. Design software such as Xilinx ISE allows the designer to design and implement a new system on FPGA chip. Behavior of FPGA which can be defined by using VHDL provides powerful high-level constructs for describing complex logic and supports modular design methodology. Real Time Digital Alarm Clock with implementation of microprogrammed control unit is developed in this project. It is one of digital design that uses VHDL as source code and microprogrammed control unit instead of hardwired one with downloading capability to FPGA based Spartan-3 Development Board. Clocked sequential state machines are normally designed using one of two general approaches: the traditional gate and flip-flop approach or microprogramming. The microprogrammed approach to implementing control state machine has been widely used since the early 1960s and has the advantages of structured programming and fixed timing characteristics. This changed around 1990 with the widespread use of hardware description languages such as VHDL. One of the reasons for the popularity of microprogramming is that it translates the hardware design problem into a programming problem, making it tractable to a wider range of designers. Control information is stored in the microprogram memory and a new microinstruction is fetched from memory at every clock cycle. Since program changes only require a change in memory contents, the rate at which the controller can be clocked does not change, no matter how significant the program change. This is in contrast to the traditional gate and flipflop approach where changes can drastically impact the logic equations, number of gates, and clock frequency. |
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