An FPGA implementation of an elliptic curve processor for an embedded public-key cryptosystem
Information security in terms of authentication, confidentiality, data integrity, and non-repudiation is one of the critical aspects in majority of communication and computer networks. The deployment of information security requires the implementation of public-key cryptographic schemes such as encr...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English |
| Published: |
2005
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/35032/1/LimKieWoon%20MFKE2005.pdf |
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| Summary: | Information security in terms of authentication, confidentiality, data integrity, and non-repudiation is one of the critical aspects in majority of communication and computer networks. The deployment of information security requires the implementation of public-key cryptographic schemes such as encryption, digital signature and key-agreement, as introduced by Diffie and Hellman in 1976. Recently, the elliptic curve cryptography (ECC) is rapidly gaining popularity due to its comparatively high security level and low bandwidth requirements. The main strength of ECC rests on the concept of discrete logarithm problem over the points on an elliptic curve, which provides higher strength-per-bit than any other current public-key cryptosystems. This thesis proposes a design of an elliptic curve processor core (ECP) to accelerate elliptic curve operations. The processor core is designed as a coprocessor to an embedded processor to perform Montgomery point multiplication and point addition. The design is described completely in parameterized VHDL code, such that the core is reconfigurable and reusable. An elliptic curve digital signature cryptosystem is developed as an evaluation platform to validate the proposed processor. The cryptosystem is an integration of a number of processors, which include an Altera Nios embedded processor, a SHA-1 hash processor core and the proposed elliptic curve processor core. The system is implemented on an Altera Nios Development Board (Stratix Professional Edition) and the experimental results show that the prototype can compute elliptic curve point multiplication in 0.14msec in finite field GF(2163) with an operating frequency of 95 MHz. This computation speed is the fastest when compared to other existing designs reported in documented literature. Consequently, the result of this work is a reusable IP (Intellectual Property) core targeted for application in high-speed security system. |
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