Instruction set simulator development for altera NIOS 2 processor
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2008
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my-utm-ep.350362013-12-27T03:17:22Z Instruction set simulator development for altera NIOS 2 processor 2008 Teh, Fu Sun Ivan TK Electrical engineering. Electronics Nuclear engineering 2008 Thesis http://eprints.utm.my/id/eprint/35036/ masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering |
| institution |
Universiti Teknologi Malaysia |
| collection |
UTM Institutional Repository |
| topic |
TK Electrical engineering Electronics Nuclear engineering |
| spellingShingle |
TK Electrical engineering Electronics Nuclear engineering Teh, Fu Sun Ivan Instruction set simulator development for altera NIOS 2 processor |
| description |
|
| format |
Thesis |
| qualification_level |
Master's degree |
| author |
Teh, Fu Sun Ivan |
| author_facet |
Teh, Fu Sun Ivan |
| author_sort |
Teh, Fu Sun Ivan |
| title |
Instruction set simulator development for altera NIOS 2 processor |
| title_short |
Instruction set simulator development for altera NIOS 2 processor |
| title_full |
Instruction set simulator development for altera NIOS 2 processor |
| title_fullStr |
Instruction set simulator development for altera NIOS 2 processor |
| title_full_unstemmed |
Instruction set simulator development for altera NIOS 2 processor |
| title_sort |
instruction set simulator development for altera nios 2 processor |
| granting_institution |
Universiti Teknologi Malaysia, Faculty of Electrical Engineering |
| granting_department |
Faculty of Electrical Engineering |
| publishDate |
2008 |
| _version_ |
1747816315508228096 |