Interconnect delay and routing in nanometer VLSI

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Main Author: Kuay, Chong Lee
Format: Thesis
Published: 2008
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id my-utm-ep.36166
record_format uketd_dc
spelling my-utm-ep.361662020-02-04T04:04:30Z Interconnect delay and routing in nanometer VLSI 2008 Kuay, Chong Lee TK Electrical engineering. Electronics Nuclear engineering 2008 Thesis http://eprints.utm.my/id/eprint/36166/ masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution Universiti Teknologi Malaysia
collection UTM Institutional Repository
topic TK Electrical engineering
Electronics Nuclear engineering
spellingShingle TK Electrical engineering
Electronics Nuclear engineering
Kuay, Chong Lee
Interconnect delay and routing in nanometer VLSI
description
format Thesis
qualification_level Master's degree
author Kuay, Chong Lee
author_facet Kuay, Chong Lee
author_sort Kuay, Chong Lee
title Interconnect delay and routing in nanometer VLSI
title_short Interconnect delay and routing in nanometer VLSI
title_full Interconnect delay and routing in nanometer VLSI
title_fullStr Interconnect delay and routing in nanometer VLSI
title_full_unstemmed Interconnect delay and routing in nanometer VLSI
title_sort interconnect delay and routing in nanometer vlsi
granting_institution Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department Faculty of Electrical Engineering
publishDate 2008
_version_ 1747816399315664896