The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array

This project report reports the development of The design and simulation of 8×1 passively quenched Single Photon Avalanche Diode (SPAD) array. This research is covered on the development and characterization of a passive quenching circuit by using Silterra 180nm CMOS technology. The main motivation...

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Main Author:	Mohamed Eusoff, Azman
Format:	Thesis
Language:	English
Published:	2013
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/39738/5/AzmanMohamedEusoffMFKE2013.pdf
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id	my-utm-ep.39738
record_format	uketd_dc
spelling	my-utm-ep.397382017-07-17T04:13:13Z The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array 2013-06 Mohamed Eusoff, Azman TK Electrical engineering. Electronics Nuclear engineering This project report reports the development of The design and simulation of 8×1 passively quenched Single Photon Avalanche Diode (SPAD) array. This research is covered on the development and characterization of a passive quenching circuit by using Silterra 180nm CMOS technology. The main motivation of this research is to design a passive quenching circuit using thin gate devices with low voltage technology design on-chip with 4-bit counter to improve the counting rate. Hence, the passive quenching circuit design on-chip would enable the capability to perform at higher speed which is more than 100MHz. The simulation and design of the passive quenching circuit will be accomplished using CADENCE tools. To perform the simulation of a passive quenching circuit in Cadence, Single Photon Avalanche Diode (SPAD) simulation model circuit is adopted and designed in CADENCE Virtuoso Schematic to generate the photon detector signal to the passive quenching circuit. The simulation characterization is implemented on single SPAD pixel and 8×1 SPAD array. The dead time for a single pixel is 9.524ns. Therefore, the circuit would promise at high frequency rate at 106MHz 2013-06 Thesis http://eprints.utm.my/id/eprint/39738/ http://eprints.utm.my/id/eprint/39738/5/AzmanMohamedEusoffMFKE2013.pdf application/pdf en public masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Mohamed Eusoff, Azman The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array
description	This project report reports the development of The design and simulation of 8×1 passively quenched Single Photon Avalanche Diode (SPAD) array. This research is covered on the development and characterization of a passive quenching circuit by using Silterra 180nm CMOS technology. The main motivation of this research is to design a passive quenching circuit using thin gate devices with low voltage technology design on-chip with 4-bit counter to improve the counting rate. Hence, the passive quenching circuit design on-chip would enable the capability to perform at higher speed which is more than 100MHz. The simulation and design of the passive quenching circuit will be accomplished using CADENCE tools. To perform the simulation of a passive quenching circuit in Cadence, Single Photon Avalanche Diode (SPAD) simulation model circuit is adopted and designed in CADENCE Virtuoso Schematic to generate the photon detector signal to the passive quenching circuit. The simulation characterization is implemented on single SPAD pixel and 8×1 SPAD array. The dead time for a single pixel is 9.524ns. Therefore, the circuit would promise at high frequency rate at 106MHz
format	Thesis
qualification_level	Master's degree
author	Mohamed Eusoff, Azman
author_facet	Mohamed Eusoff, Azman
author_sort	Mohamed Eusoff, Azman
title	The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array
title_short	The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array
title_full	The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array
title_fullStr	The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array
title_full_unstemmed	The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array
title_sort	design and simulation of 8×1 passively quenched single photon avalanche diode (spad) array
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2013
url	http://eprints.utm.my/id/eprint/39738/5/AzmanMohamedEusoffMFKE2013.pdf
_version_	1747816544638861312

The design and simulation of 8×1 passively quenched single photon avalanche diode (SPAD) array

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