Substrate warpage analysis during solder reflow process

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Bibliographic Details
Main Author:	Beh , Keh Shin
Format:	Thesis
Published:	2004
Subjects:	TK Electrical engineering Electronics Nuclear engineering
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id	my-utm-ep.42539
record_format	uketd_dc
spelling	my-utm-ep.425392017-09-25T12:47:49Z Substrate warpage analysis during solder reflow process 2004 Beh , Keh Shin TK Electrical engineering. Electronics Nuclear engineering 2004 Thesis http://eprints.utm.my/id/eprint/42539/ http://libraryopac.utm.my/client/en_AU/main/search/detailnonmodal/ent:$002f$002fSD_ILS$002f0$002fSD_ILS:386994/one?qu=Substrate+warpage+analysis+during+solder+reflow+process masters Universiti Teknologi Malaysia, Faculty of Mechanical Engineering Faculty of Mechanical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Beh , Keh Shin Substrate warpage analysis during solder reflow process
description
format	Thesis
qualification_level	Master's degree
author	Beh , Keh Shin
author_facet	Beh , Keh Shin
author_sort	Beh , Keh Shin
title	Substrate warpage analysis during solder reflow process
title_short	Substrate warpage analysis during solder reflow process
title_full	Substrate warpage analysis during solder reflow process
title_fullStr	Substrate warpage analysis during solder reflow process
title_full_unstemmed	Substrate warpage analysis during solder reflow process
title_sort	substrate warpage analysis during solder reflow process
granting_institution	Universiti Teknologi Malaysia, Faculty of Mechanical Engineering
granting_department	Faculty of Mechanical Engineering
publishDate	2004
_version_	1747816794492502016

Substrate warpage analysis during solder reflow process

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