Placement and routing in VLSI design problem using single row routing technique

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Main Author: Johar, Farhana
Format: Thesis
Published: 2003
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id my-utm-ep.42726
record_format uketd_dc
spelling my-utm-ep.427262020-09-27T05:53:36Z Placement and routing in VLSI design problem using single row routing technique 2003 Johar, Farhana T Technology (General) TK Electrical engineering. Electronics Nuclear engineering 2003 Thesis http://eprints.utm.my/id/eprint/42726/ http://libraryopac.utm.my/client/en_AU/main/search/results?qu=Placement+and+routing+in+VLSI+design+problem+using+single+row+routing+technique&te= masters Universiti Teknologi Malaysia, Faculty of Science Faculty of Science
institution Universiti Teknologi Malaysia
collection UTM Institutional Repository
topic T Technology (General)
T Technology (General)
spellingShingle T Technology (General)
T Technology (General)
Johar, Farhana
Placement and routing in VLSI design problem using single row routing technique
description
format Thesis
qualification_level Master's degree
author Johar, Farhana
author_facet Johar, Farhana
author_sort Johar, Farhana
title Placement and routing in VLSI design problem using single row routing technique
title_short Placement and routing in VLSI design problem using single row routing technique
title_full Placement and routing in VLSI design problem using single row routing technique
title_fullStr Placement and routing in VLSI design problem using single row routing technique
title_full_unstemmed Placement and routing in VLSI design problem using single row routing technique
title_sort placement and routing in vlsi design problem using single row routing technique
granting_institution Universiti Teknologi Malaysia, Faculty of Science
granting_department Faculty of Science
publishDate 2003
_version_ 1747816839735410688