APA引文

Marsono, M. N. (2001). VHDL design of A 32-Bit RISC processor core for FPGA implementation.

Chicago Style (17th ed.) Citation

Marsono, Muhammad Nadzir. VHDL Design of A 32-Bit RISC Processor Core for FPGA Implementation. 2001.

MLA引文

Marsono, Muhammad Nadzir. VHDL Design of A 32-Bit RISC Processor Core for FPGA Implementation. 2001.

警告：这些引文格式不一定是100％准确.