AMBA AXI bus to network-on-chip bridge

Bus architectures are a neccessity for today’s System-On-Chip (SoC) design. Current SoC design is getting more complex with additional features and functions. The bus architecure arbitration need to handle requests from multiple cores where this will ultimately becomes a bottleneck to the bus archit...

Full description

Saved in:
Bibliographic Details
Main Author: Ng, Keng Yoke
Format: Thesis
Language:English
Published: 2013
Subjects:
Online Access:http://eprints.utm.my/id/eprint/44644/5/NgKengYokeMFKE2013.pdf
Tags: Add Tag
No Tags, Be the first to tag this record!
id my-utm-ep.44644
record_format uketd_dc
spelling my-utm-ep.446442017-07-17T06:50:34Z AMBA AXI bus to network-on-chip bridge 2013-06 Ng, Keng Yoke TK Electrical engineering. Electronics Nuclear engineering Bus architectures are a neccessity for today’s System-On-Chip (SoC) design. Current SoC design is getting more complex with additional features and functions. The bus architecure arbitration need to handle requests from multiple cores where this will ultimately becomes a bottleneck to the bus architecture performances. Most Intellectual Property (IP) designs today use bus protocol such as Advanced Microcontroller Bus Architecture (AMBA) Advanced High-performance Bus (AHB) and are facing such limitations. The ability for an IP core to be reusable in Network-on- Chip (NoC) based SoCs is highly desirable. The solution is to implement the AMBA Advanced eXtensible Interface (AXI) to NoC bridge which emulates the bus protocol and convert it to NoC protocol and vice versa, enabling quick migration of IPs cores designed for a traditional bus architecture to the NoC architecture. In this work, a busto- NoC bridge has been designed. The bus-to-NoC bridge converts the AMBA AXI bus protocol to NoC protocol and sends through NoC interface, achieving performance gain comparable to the traditional AMBA bus architectures. The advantages of busto- NoC bridge architecture includes 1. Two times performance gain in terms of latency and throughput compared to tranditional bus architectures. 2. Supports various AXI command signals such as protection unit supports information signals, Atomic operations signals, error response encoding for AXI and ordering rules signals. 3. The ability to support burst for memory access. This enables the migration of bus architectures to NoC architectures, which will likely be the future design trend. 2013-06 Thesis http://eprints.utm.my/id/eprint/44644/ http://eprints.utm.my/id/eprint/44644/5/NgKengYokeMFKE2013.pdf application/pdf en public masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution Universiti Teknologi Malaysia
collection UTM Institutional Repository
language English
topic TK Electrical engineering
Electronics Nuclear engineering
spellingShingle TK Electrical engineering
Electronics Nuclear engineering
Ng, Keng Yoke
AMBA AXI bus to network-on-chip bridge
description Bus architectures are a neccessity for today’s System-On-Chip (SoC) design. Current SoC design is getting more complex with additional features and functions. The bus architecure arbitration need to handle requests from multiple cores where this will ultimately becomes a bottleneck to the bus architecture performances. Most Intellectual Property (IP) designs today use bus protocol such as Advanced Microcontroller Bus Architecture (AMBA) Advanced High-performance Bus (AHB) and are facing such limitations. The ability for an IP core to be reusable in Network-on- Chip (NoC) based SoCs is highly desirable. The solution is to implement the AMBA Advanced eXtensible Interface (AXI) to NoC bridge which emulates the bus protocol and convert it to NoC protocol and vice versa, enabling quick migration of IPs cores designed for a traditional bus architecture to the NoC architecture. In this work, a busto- NoC bridge has been designed. The bus-to-NoC bridge converts the AMBA AXI bus protocol to NoC protocol and sends through NoC interface, achieving performance gain comparable to the traditional AMBA bus architectures. The advantages of busto- NoC bridge architecture includes 1. Two times performance gain in terms of latency and throughput compared to tranditional bus architectures. 2. Supports various AXI command signals such as protection unit supports information signals, Atomic operations signals, error response encoding for AXI and ordering rules signals. 3. The ability to support burst for memory access. This enables the migration of bus architectures to NoC architectures, which will likely be the future design trend.
format Thesis
qualification_level Master's degree
author Ng, Keng Yoke
author_facet Ng, Keng Yoke
author_sort Ng, Keng Yoke
title AMBA AXI bus to network-on-chip bridge
title_short AMBA AXI bus to network-on-chip bridge
title_full AMBA AXI bus to network-on-chip bridge
title_fullStr AMBA AXI bus to network-on-chip bridge
title_full_unstemmed AMBA AXI bus to network-on-chip bridge
title_sort amba axi bus to network-on-chip bridge
granting_institution Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department Faculty of Electrical Engineering
publishDate 2013
url http://eprints.utm.my/id/eprint/44644/5/NgKengYokeMFKE2013.pdf
_version_ 1747817260379013120