Arbitration schemes of wishbone on chip bus system
In the SoC development, the compatibility of IP cores is one of the challenges that need to be addressed carefully. Most of the time, IP cores is having different input output specifications with new platform. The Wishbone SoC interconnection Architecture is aim to provide a good solution for SoC in...
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| 主要作者: | |
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| 格式: | Thesis |
| 語言: | English |
| 出版: |
2014
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| 主題: | |
| 在線閱讀: | http://eprints.utm.my/id/eprint/47999/25/OngKokTongMFKE2014.pdf |
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