Program control instruction class of x86 instruction set architecture compatible CPU
Digital system designers nowadays facing the challenge of need to come out new design or improved design fast such as IP core or interface system that will be embedded into System-On-Chip. Rapid prototyping requires platform for development design and testing of any digital system. A platform that i...
Saved in:
| Main Author: | |
|---|---|
| Format: | Thesis |
| Language: | English |
| Published: |
2014
|
| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/48850/25/NgTeikHuatMFKE2014.pdf |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | Digital system designers nowadays facing the challenge of need to come out new design or improved design fast such as IP core or interface system that will be embedded into System-On-Chip. Rapid prototyping requires platform for development design and testing of any digital system. A platform that is flexible to fine tune where the source code or the internal design is visible and accessible by designer is preferable to increasing the opportunity for design exploration. Technology leading company such as Intel, Altera, and Xilinx have these platform ready but with limited access to internal design and source code as it is their company IP and trade secret. Currently most digital system was design and implemented on FPGA before goes into production. The design in hardware description language like Verilog HDL was compiled into physical netlists using compiler tools such as Synopsys, Altera Quartus II and consume by the FPGAs, thereby reducing the design cycle while increasing the opportunity for design exploration. |
|---|