Program control instruction class of x86 instruction set architecture compatible CPU

Digital system designers nowadays facing the challenge of need to come out new design or improved design fast such as IP core or interface system that will be embedded into System-On-Chip. Rapid prototyping requires platform for development design and testing of any digital system. A platform that i...

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Main Author:	Ng, Teik Huat
Format:	Thesis
Language:	English
Published:	2014
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/48850/25/NgTeikHuatMFKE2014.pdf
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id	my-utm-ep.48850
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spelling	my-utm-ep.488502020-07-01T06:42:22Z Program control instruction class of x86 instruction set architecture compatible CPU 2014-06 Ng, Teik Huat TK Electrical engineering. Electronics Nuclear engineering Digital system designers nowadays facing the challenge of need to come out new design or improved design fast such as IP core or interface system that will be embedded into System-On-Chip. Rapid prototyping requires platform for development design and testing of any digital system. A platform that is flexible to fine tune where the source code or the internal design is visible and accessible by designer is preferable to increasing the opportunity for design exploration. Technology leading company such as Intel, Altera, and Xilinx have these platform ready but with limited access to internal design and source code as it is their company IP and trade secret. Currently most digital system was design and implemented on FPGA before goes into production. The design in hardware description language like Verilog HDL was compiled into physical netlists using compiler tools such as Synopsys, Altera Quartus II and consume by the FPGAs, thereby reducing the design cycle while increasing the opportunity for design exploration. 2014-06 Thesis http://eprints.utm.my/id/eprint/48850/ http://eprints.utm.my/id/eprint/48850/25/NgTeikHuatMFKE2014.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:83662 masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Ng, Teik Huat Program control instruction class of x86 instruction set architecture compatible CPU
description	Digital system designers nowadays facing the challenge of need to come out new design or improved design fast such as IP core or interface system that will be embedded into System-On-Chip. Rapid prototyping requires platform for development design and testing of any digital system. A platform that is flexible to fine tune where the source code or the internal design is visible and accessible by designer is preferable to increasing the opportunity for design exploration. Technology leading company such as Intel, Altera, and Xilinx have these platform ready but with limited access to internal design and source code as it is their company IP and trade secret. Currently most digital system was design and implemented on FPGA before goes into production. The design in hardware description language like Verilog HDL was compiled into physical netlists using compiler tools such as Synopsys, Altera Quartus II and consume by the FPGAs, thereby reducing the design cycle while increasing the opportunity for design exploration.
format	Thesis
qualification_level	Master's degree
author	Ng, Teik Huat
author_facet	Ng, Teik Huat
author_sort	Ng, Teik Huat
title	Program control instruction class of x86 instruction set architecture compatible CPU
title_short	Program control instruction class of x86 instruction set architecture compatible CPU
title_full	Program control instruction class of x86 instruction set architecture compatible CPU
title_fullStr	Program control instruction class of x86 instruction set architecture compatible CPU
title_full_unstemmed	Program control instruction class of x86 instruction set architecture compatible CPU
title_sort	program control instruction class of x86 instruction set architecture compatible cpu
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2014
url	http://eprints.utm.my/id/eprint/48850/25/NgTeikHuatMFKE2014.pdf
_version_	1747817486958460928

Program control instruction class of x86 instruction set architecture compatible CPU

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