Field programmable gate array architecture of proportional-integral-derivative controller
Proportional-integral-derivative (PID) control is widely used in control and automation. PID implementation in software especially using microcontroller requires a lot of CPU execution time. The performance of PID controller can be improved by accelerating control function in hardware. Thus, the per...
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my-utm-ep.538662020-09-13T09:14:47Z Field programmable gate array architecture of proportional-integral-derivative controller 2015-06 Yusof, Zulkifli TK Electrical engineering. Electronics Nuclear engineering Proportional-integral-derivative (PID) control is widely used in control and automation. PID implementation in software especially using microcontroller requires a lot of CPU execution time. The performance of PID controller can be improved by accelerating control function in hardware. Thus, the performance and throughput can be further improved when incorporated in FPGA architecture system. This project focuses on exploration of hardware architecture of PID controller and targeted for implementation on FPGA system. The architecture exploration include concurrent, serial and pipeline designs, functionality correctness and non-functional verification. These architectures was designed to support modularity and can be use for other control applications. Serial design architecture of PID is able to reduce - 60% of datapath unit resources compared to concurrent design but it required five cycles to produce the output. High throughput can be achieve using pipeline design and required 7 more registers compared to concurrent design with pipeline speed up about 1.5 and five times compared to serial design architecture. 2015-06 Thesis http://eprints.utm.my/id/eprint/53866/ http://eprints.utm.my/id/eprint/53866/1/ZulkifliYusofMFKE2015.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:85877 masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering |
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TK Electrical engineering Electronics Nuclear engineering |
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TK Electrical engineering Electronics Nuclear engineering Yusof, Zulkifli Field programmable gate array architecture of proportional-integral-derivative controller |
description |
Proportional-integral-derivative (PID) control is widely used in control and automation. PID implementation in software especially using microcontroller requires a lot of CPU execution time. The performance of PID controller can be improved by accelerating control function in hardware. Thus, the performance and throughput can be further improved when incorporated in FPGA architecture system. This project focuses on exploration of hardware architecture of PID controller and targeted for implementation on FPGA system. The architecture exploration include concurrent, serial and pipeline designs, functionality correctness and non-functional verification. These architectures was designed to support modularity and can be use for other control applications. Serial design architecture of PID is able to reduce - 60% of datapath unit resources compared to concurrent design but it required five cycles to produce the output. High throughput can be achieve using pipeline design and required 7 more registers compared to concurrent design with pipeline speed up about 1.5 and five times compared to serial design architecture. |
format |
Thesis |
qualification_level |
Master's degree |
author |
Yusof, Zulkifli |
author_facet |
Yusof, Zulkifli |
author_sort |
Yusof, Zulkifli |
title |
Field programmable gate array architecture of proportional-integral-derivative controller |
title_short |
Field programmable gate array architecture of proportional-integral-derivative controller |
title_full |
Field programmable gate array architecture of proportional-integral-derivative controller |
title_fullStr |
Field programmable gate array architecture of proportional-integral-derivative controller |
title_full_unstemmed |
Field programmable gate array architecture of proportional-integral-derivative controller |
title_sort |
field programmable gate array architecture of proportional-integral-derivative controller |
granting_institution |
Universiti Teknologi Malaysia, Faculty of Electrical Engineering |
granting_department |
Faculty of Electrical Engineering |
publishDate |
2015 |
url |
http://eprints.utm.my/id/eprint/53866/1/ZulkifliYusofMFKE2015.pdf |
_version_ |
1747817645409828864 |