Finfet based design of XOR and XNOR using HSPICE

XOR and XNOR are popular gates in microprocessors. They are fundamental unit circuits used in adder, multiplexer, comparator, parity checker and generator circuits. This project proposes a new five transistors XOR-XNOR design using FinFET. The use of conventional MOSFET as basic unit of XOR and XNOR...

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Main Author:	Cheah, Hui Fuen
Format:	Thesis
Language:	English
Published:	2015
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/53889/1/CheahHuiFuenMFKE2015.pdf
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spelling	my-utm-ep.538892020-10-08T00:49:10Z Finfet based design of XOR and XNOR using HSPICE 2015-06 Cheah, Hui Fuen TK Electrical engineering. Electronics Nuclear engineering XOR and XNOR are popular gates in microprocessors. They are fundamental unit circuits used in adder, multiplexer, comparator, parity checker and generator circuits. This project proposes a new five transistors XOR-XNOR design using FinFET. The use of conventional MOSFET as basic unit of XOR and XNOR design has reached its performance limit due to short channel effects (SCEs) at nanoscale region. International Technology Roadmap for Semiconductors (ITRS) had proposed FinFET to replace conventional MOSFET to overcome the limitations of MOSFET at nanoscale region. Impact of variation FinFET parameters such as gate length, fin height and fin thickness to performance of proposed design are analyzed. In this project, the proposed design is compared with other existing designs in terms of power, delay, power delay product (PDP) and energy delay product (EDP). Simulation results demonstrate the power, delay, PDP and EDP at different supply voltage range from 0.6V to 1.2V using HSPICE alongside with CosmosScope. The simulation results reveal that the proposed design has full output swing with all input combinations. It consumes least power compared to existing designs and has low PDP and EDP. This project also compare the performance between SG FinFET and IG FinFET based designs. IG FinFET based design consumes lesser power but bigger delay. Thus, higher PDP and EDP compared to SG FinFET based design. 2015-06 Thesis http://eprints.utm.my/id/eprint/53889/ http://eprints.utm.my/id/eprint/53889/1/CheahHuiFuenMFKE2015.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:86558 masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Cheah, Hui Fuen Finfet based design of XOR and XNOR using HSPICE
description	XOR and XNOR are popular gates in microprocessors. They are fundamental unit circuits used in adder, multiplexer, comparator, parity checker and generator circuits. This project proposes a new five transistors XOR-XNOR design using FinFET. The use of conventional MOSFET as basic unit of XOR and XNOR design has reached its performance limit due to short channel effects (SCEs) at nanoscale region. International Technology Roadmap for Semiconductors (ITRS) had proposed FinFET to replace conventional MOSFET to overcome the limitations of MOSFET at nanoscale region. Impact of variation FinFET parameters such as gate length, fin height and fin thickness to performance of proposed design are analyzed. In this project, the proposed design is compared with other existing designs in terms of power, delay, power delay product (PDP) and energy delay product (EDP). Simulation results demonstrate the power, delay, PDP and EDP at different supply voltage range from 0.6V to 1.2V using HSPICE alongside with CosmosScope. The simulation results reveal that the proposed design has full output swing with all input combinations. It consumes least power compared to existing designs and has low PDP and EDP. This project also compare the performance between SG FinFET and IG FinFET based designs. IG FinFET based design consumes lesser power but bigger delay. Thus, higher PDP and EDP compared to SG FinFET based design.
format	Thesis
qualification_level	Master's degree
author	Cheah, Hui Fuen
author_facet	Cheah, Hui Fuen
author_sort	Cheah, Hui Fuen
title	Finfet based design of XOR and XNOR using HSPICE
title_short	Finfet based design of XOR and XNOR using HSPICE
title_full	Finfet based design of XOR and XNOR using HSPICE
title_fullStr	Finfet based design of XOR and XNOR using HSPICE
title_full_unstemmed	Finfet based design of XOR and XNOR using HSPICE
title_sort	finfet based design of xor and xnor using hspice
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2015
url	http://eprints.utm.my/id/eprint/53889/1/CheahHuiFuenMFKE2015.pdf
_version_	1747817651042779136

Finfet based design of XOR and XNOR using HSPICE

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