Time and frequency characterization of the high speed I/O data bus

High speed data transfer between the CPU and peripherals on the PC motherboard is needed to support data traffic in future generation applications such as multimedia, games and broadband networks. The High Speed I/O data bus is developed to meet these applications. At high speed with multi Gbits/sec...

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Bibliographic Details
Main Author:	Huang, Jimmy Huat Since
Format:	Thesis
Language:	English
Published:	2007
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/5965/1/JimmyHuangHuatSinceMFKE2007.pdf
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id	my-utm-ep.5965
record_format	uketd_dc
spelling	my-utm-ep.59652018-08-26T04:43:03Z Time and frequency characterization of the high speed I/O data bus 2007-05-03 Huang, Jimmy Huat Since TK Electrical engineering. Electronics Nuclear engineering High speed data transfer between the CPU and peripherals on the PC motherboard is needed to support data traffic in future generation applications such as multimedia, games and broadband networks. The High Speed I/O data bus is developed to meet these applications. At high speed with multi Gbits/sec, impedance mismatch between the CPU and peripherals becomes critical and limits the possible maximum throughput. This effect can be modeled as a convolution process where the I/O bus behaves as a linear time invariant system that is defined by a channel impulse and frequency response. Since there are variations in the characteristic of the motherboards due to the fabrication and assembly process, it is desired to estimate the impulse response and frequency response of the High Speed I/O bus. This information can be used to gage the capability of the motherboard and use it as feedback to the relevant fabrication and assembly processes. By using simulation on MATLAB and EDA tools, two candidate methods will be evaluated: Impulse response and correlation method using simulated channel characteristics. Robustness of both methods will be evaluated in the presence of noise and cross talk. Further evaluation will be performed on data collected from actual production test of the I/O Bus. This is to evaluate the capability of the evaluated methods under actual manufacturing environment. 2007-05 Thesis http://eprints.utm.my/id/eprint/5965/ http://eprints.utm.my/id/eprint/5965/1/JimmyHuangHuatSinceMFKE2007.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:62177 masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Huang, Jimmy Huat Since Time and frequency characterization of the high speed I/O data bus
description	High speed data transfer between the CPU and peripherals on the PC motherboard is needed to support data traffic in future generation applications such as multimedia, games and broadband networks. The High Speed I/O data bus is developed to meet these applications. At high speed with multi Gbits/sec, impedance mismatch between the CPU and peripherals becomes critical and limits the possible maximum throughput. This effect can be modeled as a convolution process where the I/O bus behaves as a linear time invariant system that is defined by a channel impulse and frequency response. Since there are variations in the characteristic of the motherboards due to the fabrication and assembly process, it is desired to estimate the impulse response and frequency response of the High Speed I/O bus. This information can be used to gage the capability of the motherboard and use it as feedback to the relevant fabrication and assembly processes. By using simulation on MATLAB and EDA tools, two candidate methods will be evaluated: Impulse response and correlation method using simulated channel characteristics. Robustness of both methods will be evaluated in the presence of noise and cross talk. Further evaluation will be performed on data collected from actual production test of the I/O Bus. This is to evaluate the capability of the evaluated methods under actual manufacturing environment.
format	Thesis
qualification_level	Master's degree
author	Huang, Jimmy Huat Since
author_facet	Huang, Jimmy Huat Since
author_sort	Huang, Jimmy Huat Since
title	Time and frequency characterization of the high speed I/O data bus
title_short	Time and frequency characterization of the high speed I/O data bus
title_full	Time and frequency characterization of the high speed I/O data bus
title_fullStr	Time and frequency characterization of the high speed I/O data bus
title_full_unstemmed	Time and frequency characterization of the high speed I/O data bus
title_sort	time and frequency characterization of the high speed i/o data bus
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2007
url	http://eprints.utm.my/id/eprint/5965/1/JimmyHuangHuatSinceMFKE2007.pdf
_version_	1747814617626705920

Time and frequency characterization of the high speed I/O data bus

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