Hardware core of pipelined thinning algorithm

The process to associate a particular individual with an identity is known as personal recognition. One of the recognition system type is biometrics system. A biometric system is essentially a pattern recognition system that that performs authentication based on the individual’s behavioural or physi...

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Main Author:	Noordin, Mohamad Amin
Format:	Thesis
Language:	English
Published:	2015
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/60941/1/MohamadAminNoordinMFKE2015.pdf
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id	my-utm-ep.60941
record_format	uketd_dc
spelling	my-utm-ep.609412021-01-13T08:54:41Z Hardware core of pipelined thinning algorithm 2015-06 Noordin, Mohamad Amin TK Electrical engineering. Electronics Nuclear engineering The process to associate a particular individual with an identity is known as personal recognition. One of the recognition system type is biometrics system. A biometric system is essentially a pattern recognition system that that performs authentication based on the individual’s behavioural or physiological characteristics. One of the method is finger vein biometrics, which is an authentication technique that identify individuals and verify identity based on the images of human finger veins beneath the skin. There are a lot of process involved in a complete biometrics system. One of the process is thinning. Thinning or skeletonization is a process that extracts the vein patterns from binary image and produces 1-pixel wide output binary image as the result. Existing biometrics system have their own weaknesses and drawbacks such as not showing "aliveness" and also easy to be tampered with. Moreover, software implementation of biometrics system usually performed in an insecure environment and biometrics template stored in a central server. This is insecure and can cause leakage of information. Furthermore, thinning is a time consuming process, which takes a very long time to be completed in software implementation. So the objective of this work is to design a dedicated hardware core for thinning algorithm, implement and enhance the existing algorithm for better hardware performance, and apply pipeline architecture to the hardware design to further speed-up thinning process. This work will implement the algorithm in software and hardware. Hardware implementation of the algorithm is compared with software implementation in terms of accuracy and performance (speed). The hardware core designed managed to achieve a significant improvement in processing time. The work done in this project also managed to map a complex algorithm into hardware implementation and is the first one to implement thinning hardware design using System Verilog. 2015-06 Thesis http://eprints.utm.my/id/eprint/60941/ http://eprints.utm.my/id/eprint/60941/1/MohamadAminNoordinMFKE2015.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:94132 masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Noordin, Mohamad Amin Hardware core of pipelined thinning algorithm
description	The process to associate a particular individual with an identity is known as personal recognition. One of the recognition system type is biometrics system. A biometric system is essentially a pattern recognition system that that performs authentication based on the individual’s behavioural or physiological characteristics. One of the method is finger vein biometrics, which is an authentication technique that identify individuals and verify identity based on the images of human finger veins beneath the skin. There are a lot of process involved in a complete biometrics system. One of the process is thinning. Thinning or skeletonization is a process that extracts the vein patterns from binary image and produces 1-pixel wide output binary image as the result. Existing biometrics system have their own weaknesses and drawbacks such as not showing "aliveness" and also easy to be tampered with. Moreover, software implementation of biometrics system usually performed in an insecure environment and biometrics template stored in a central server. This is insecure and can cause leakage of information. Furthermore, thinning is a time consuming process, which takes a very long time to be completed in software implementation. So the objective of this work is to design a dedicated hardware core for thinning algorithm, implement and enhance the existing algorithm for better hardware performance, and apply pipeline architecture to the hardware design to further speed-up thinning process. This work will implement the algorithm in software and hardware. Hardware implementation of the algorithm is compared with software implementation in terms of accuracy and performance (speed). The hardware core designed managed to achieve a significant improvement in processing time. The work done in this project also managed to map a complex algorithm into hardware implementation and is the first one to implement thinning hardware design using System Verilog.
format	Thesis
qualification_level	Master's degree
author	Noordin, Mohamad Amin
author_facet	Noordin, Mohamad Amin
author_sort	Noordin, Mohamad Amin
title	Hardware core of pipelined thinning algorithm
title_short	Hardware core of pipelined thinning algorithm
title_full	Hardware core of pipelined thinning algorithm
title_fullStr	Hardware core of pipelined thinning algorithm
title_full_unstemmed	Hardware core of pipelined thinning algorithm
title_sort	hardware core of pipelined thinning algorithm
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2015
url	http://eprints.utm.my/id/eprint/60941/1/MohamadAminNoordinMFKE2015.pdf
_version_	1747817771943591936

Hardware core of pipelined thinning algorithm

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