APA引文

Ch'ng, H. S. (2007). Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing.

Chicago Style (17th ed.) Citation

Ch'ng, Heng Sun. Graph Processing Hardware Accelerator for Shortest Path Algorithms in Nanometer Very Large-scale Integration Interconnect Routing. 2007.

MLA引文

Ch'ng, Heng Sun. Graph Processing Hardware Accelerator for Shortest Path Algorithms in Nanometer Very Large-scale Integration Interconnect Routing. 2007.

警告：這些引文格式不一定是100％准確.