Lai, Y. P. (2007). Verilog design of a 256-bit AES crypto processor core.
Chicago Style (17th ed.) CitationLai, Yit Pin. Verilog Design of a 256-bit AES Crypto Processor Core. 2007.
MLA引文Lai, Yit Pin. Verilog Design of a 256-bit AES Crypto Processor Core. 2007.
警告：这些引文格式不一定是100％准确.