RTL implementation of one-sided jacobi algorithm for singular value decomposition

Multi-dimensional digital signal processing such as image processing and image reconstruction involve manipulating of matrix data. Better quality images involve large amount of data, which result in unacceptably slow computation. A parallel processing scheme is a possible solution to solve this prob...

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Main Author:	Wan Mohamad, Wan Ahmad Zainie
Format:	Thesis
Language:	English
Published:	2016
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/78060/1/WanAhmadZainieMFKE20161.pdf
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id	my-utm-ep.78060
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spelling	my-utm-ep.780602018-07-23T05:33:24Z RTL implementation of one-sided jacobi algorithm for singular value decomposition 2016-06 Wan Mohamad, Wan Ahmad Zainie TK Electrical engineering. Electronics Nuclear engineering Multi-dimensional digital signal processing such as image processing and image reconstruction involve manipulating of matrix data. Better quality images involve large amount of data, which result in unacceptably slow computation. A parallel processing scheme is a possible solution to solve this problem. This project presented an analysis and comparison to various algorithms for widely used matrix decomposition techniques and various computer architectures. As the result, a parallel implementation of one-sided Jacobi algorithm for computing singular value decomposition (SVD) of a 2х2 matrix on field programmable gate arrays (FPGA) is developed. The proposed SVD design is based on pipelined-datapath architecture The design process is started by evaluating the algorithm using Matlab, design datapath unit and control unit, coding in SystemVerilog HDL, verification and synthesis using Quartus II and simulated on ModelSim-Altera. The original matrix size of 4x4 and 8x8 is used to with the SVD processing element (PE). The result are compared with the Matlab version of the algorithm to evaluate the PE. The computation of SVD can be speed-up of more than 2 by increasing the number of PE at the cost of increased in circuit area. 2016-06 Thesis http://eprints.utm.my/id/eprint/78060/ http://eprints.utm.my/id/eprint/78060/1/WanAhmadZainieMFKE20161.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:90252 masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Wan Mohamad, Wan Ahmad Zainie RTL implementation of one-sided jacobi algorithm for singular value decomposition
description	Multi-dimensional digital signal processing such as image processing and image reconstruction involve manipulating of matrix data. Better quality images involve large amount of data, which result in unacceptably slow computation. A parallel processing scheme is a possible solution to solve this problem. This project presented an analysis and comparison to various algorithms for widely used matrix decomposition techniques and various computer architectures. As the result, a parallel implementation of one-sided Jacobi algorithm for computing singular value decomposition (SVD) of a 2х2 matrix on field programmable gate arrays (FPGA) is developed. The proposed SVD design is based on pipelined-datapath architecture The design process is started by evaluating the algorithm using Matlab, design datapath unit and control unit, coding in SystemVerilog HDL, verification and synthesis using Quartus II and simulated on ModelSim-Altera. The original matrix size of 4x4 and 8x8 is used to with the SVD processing element (PE). The result are compared with the Matlab version of the algorithm to evaluate the PE. The computation of SVD can be speed-up of more than 2 by increasing the number of PE at the cost of increased in circuit area.
format	Thesis
qualification_level	Master's degree
author	Wan Mohamad, Wan Ahmad Zainie
author_facet	Wan Mohamad, Wan Ahmad Zainie
author_sort	Wan Mohamad, Wan Ahmad Zainie
title	RTL implementation of one-sided jacobi algorithm for singular value decomposition
title_short	RTL implementation of one-sided jacobi algorithm for singular value decomposition
title_full	RTL implementation of one-sided jacobi algorithm for singular value decomposition
title_fullStr	RTL implementation of one-sided jacobi algorithm for singular value decomposition
title_full_unstemmed	RTL implementation of one-sided jacobi algorithm for singular value decomposition
title_sort	rtl implementation of one-sided jacobi algorithm for singular value decomposition
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2016
url	http://eprints.utm.my/id/eprint/78060/1/WanAhmadZainieMFKE20161.pdf
_version_	1747817897205432320

RTL implementation of one-sided jacobi algorithm for singular value decomposition

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