Principal component analysis hardware acceleration

Principal component analysis hardware acceleration

Since machine learning is getting more attention in various applications, the performance of those applications has become the main concern of its users. To perform machine learning, one of the vital processes is feature extraction which is to reduce the raw data dimension that aims to get rid of no...

Saved in:

书目详细资料
主要作者:	Ng, Yee Wei
格式:	Thesis
语言:	English
出版:	2020
主题:	TK Electrical engineering Electronics Nuclear engineering
在线阅读:	http://eprints.utm.my/id/eprint/93003/1/NgYeeWeiMSKE2020.pdf
标签:	添加标签没有标签, 成为第一个标记此记录!

相似书籍

Hardware acceleration of secure hash algorithm 3
由: Ng, Lai Boon
出版: (2020)

Hardware accelerator implementation of colour correction algorithm
由: Loh, Shu Ting
出版: (2020)

Electrocardiogram QRS detection hardware accelerator for ASIC implementation
由: Lim, Zhi Qing
出版: (2020)

Support vector machine hardware accelerator for tongue colour diagnosis
由: Thiah, Amanda Su Lin
出版: (2020)

Hardware based accelerator for database query using M-tree
由: Chai, Kah Hieng
出版: (2018)

Hardware acceleration of 2D convolution using systolic array
由: Wong, Xue Yuan
出版: (2015)

8192 bit Rivest-Shamir-Adleman data encryption hardware accelerator
由: Chew, Yen Wen
出版: (2015)

Face detection hardware accelerator using C-based high-level synthesis
由: Yeap, Han Chien
出版: (2018)

Hardware-based biometric encryption implementation with Gauss-Jordan algorithm accelerator core in field programmable gate arrays
由: Liew, Tek Yee
出版: (2011)

Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing
由: Ch'ng, Heng Sun
出版: (2007)

An embedded system for networking security applying cryptographic acceleration in field programmable gate array hardware
由: Paramasivam, Vishnu
出版: (2009)

Field programmable gate array based convolution neural network hardware accelerator with optimized memory controller
由: Mohammed, Mohammed Isam Eldin Hassan
出版: (2020)

Fault detection and monitoring system using enhanced principal component analysis for the application in wastewater treatment plant
由: Mirin, Siti Nur Suhaila
出版: (2014)

Performances comparison of principal component and linear discriminant analysis based face biometrics using artificial neural network and adaboost
由: Chan , Lih Heng
出版: (2010)

Hardware Realization Of Fuzzy Wavelets Neural Network To Power Quality Analysis
由: Choong, Florence Chiao Mei
出版: (2005)

Magnetohydrodynamic accelerator with equilibrium plasma
由: Sukarsan, Sukarsan
出版: (2009)

Magnetohydrodynamic accelerator with equilibrium plasma
由: Sukarsan, Sukarsan
出版: (2010)

Hardware core of pipelined thinning algorithm
由: Noordin, Mohamad Amin
出版: (2015)

Implementation of reconfigurable viterbi decoders in hardware
由: Noor Batcha, Mohamed Farid
出版: (2010)

Speed enhancement on a matrix inversion hardware architecture based on Gauss-Jordan Elimination
由: Oh, Eng Wei
出版: (2015)

A hardware architecture of prewitt edge detection
由: Seif, Aramesh
出版: (2009)

Hardware implementation using FPGA for barcode reader
由: Marzuki, Ade Syaheda Wani
出版: (2008)

Single board computer based hardware-input
由: A. Hassan, Walid
出版: (2009)

Power efficient blockchain miner accelerator design
由: Lim, Calvin
出版: (2022)

Design and implementation of OFDM transmitter and receiver on FPGA hardware
由: Kadiran, Kamaru Adzha
出版: (2005)

Hardware implementation of naive bayes classifier for malware detection
由: Al Hussein, Yahya Khaled
出版: (2021)

Implementation of instruction decoding logic using hardware and software
由: Su, Chee Siong
出版: (2010)

Numerical simulation magnetohydrodynamic accelerator with nonequilibrium air plasma
由: Qazi , Hummad Habib
出版: (2010)

Modeling of image processing algorithms for hardware-software co-simulation
由: Isa, Ibrahim
出版: (2015)

High resolution impulse analysing system - hardware and software implementation
由: Kassim, Ahmad Tarmimi
出版: (2015)

A hardware architecture of gaussian filter for digital image processing
由: Mohammadpoursalut, Mohammad
出版: (2009)

Convolution and max pooling layer accelerator for convolutional neural network
由: Goh, Jinn Chyn
出版: (2020)

Hardware-based genetic algorithm implementation in field programmable gate arrays
由: Balakrishnan, Sathivellu
出版: (2012)

A hardware architecture of stateless open digest spam fingerprinting unit
由: Monemi, Alireza
出版: (2010)

Register-transfer-level Hardware Trojan classification boosted with gate-level features
由: Choo, Hau Sim
出版: (2022)

Hash function of cryptographically secure pseudorandom number generator for hardware root-of-trust
由: Ong, Elaine Ei Ling
出版: (2021)

An embedded cryptosystem implementing symmetric cipher and public-key crypto algorithms in hardware
由: Hau, Yuan Wen
出版: (2005)

Hardware implementation of coordinate rotation digital computer in field programmable gate array
由: Mohd. Sazali, Mohd. Ilyas Sobirin
出版: (2012)

Hardware Prototyping Of An Efficient Image Compression System In Real-Time For Mobile Communication
由: Akter, Masuma
出版: (2008)

A hardware implementation of Rivest-Shamir-Adleman co-processor for resource constrained embedded systems
由: Paniandi, Arul
出版: (2006)

Services hosted by the Perpustakaan Sultan Abdul Samad, Universiti Putra Malaysia with Cooperation MySyL Group