Hardware implementation of naive bayes classifier for malware detection

Naïve bayes classifier is a probabilistic supervised machine learning algorithm, that can be launched on most general-purpose devices to solve wide range of classification problems. However, when it comes to real time applications, the general-purpose devices are limited in term of their computation...

Full description

Saved in:

Bibliographic Details
Main Author:	Al Hussein, Yahya Khaled
Format:	Thesis
Language:	English
Published:	2021
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/96903/1/YahyaKhaledMSKE2021.pdf.pdf
Tags:	Add Tag No Tags, Be the first to tag this record!

id	my-utm-ep.96903
record_format	uketd_dc
spelling	my-utm-ep.969032022-08-28T04:03:23Z Hardware implementation of naive bayes classifier for malware detection 2021 Al Hussein, Yahya Khaled TK Electrical engineering. Electronics Nuclear engineering Naïve bayes classifier is a probabilistic supervised machine learning algorithm, that can be launched on most general-purpose devices to solve wide range of classification problems. However, when it comes to real time applications, the general-purpose devices are limited in term of their computational throughput, thus this algorithm couldn’t be used for that purpose. The aim of this project is to accelerate this algorithm in hardware environment to improve its performance by exploring its hidden concurrency and map it into parallel hardware as an optimized IP package, suitable for FPGA-SoC applications. Thus, it could be used as a middle box system for real time malware detection. In order for the proposed hardware to meet the requirements of this research, it should be able to handle both training, and inference part in hardware, and also should be able to receive a flow of 20 features, each of 32-bitsize, organized in 4-gram format. To meet these requirements, an enhanced version of the algorithm was developed and tested in Cprogramming. Then an equivalent design with a 5-stages pipelined architecture, and single instruction multiple data capabilities, was built in hardware to address the case. At the end, the proposed hardware found to be 65 times faster in term of its computational throughput compared to an existing design, and that with keeping the accuracy level as high as 94%, under the conditions of experiment carried. 2021 Thesis http://eprints.utm.my/id/eprint/96903/ http://eprints.utm.my/id/eprint/96903/1/YahyaKhaledMSKE2021.pdf.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:142172 masters Universiti Teknologi Malaysia Faculty of Engineering - School of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Al Hussein, Yahya Khaled Hardware implementation of naive bayes classifier for malware detection
description	Naïve bayes classifier is a probabilistic supervised machine learning algorithm, that can be launched on most general-purpose devices to solve wide range of classification problems. However, when it comes to real time applications, the general-purpose devices are limited in term of their computational throughput, thus this algorithm couldn’t be used for that purpose. The aim of this project is to accelerate this algorithm in hardware environment to improve its performance by exploring its hidden concurrency and map it into parallel hardware as an optimized IP package, suitable for FPGA-SoC applications. Thus, it could be used as a middle box system for real time malware detection. In order for the proposed hardware to meet the requirements of this research, it should be able to handle both training, and inference part in hardware, and also should be able to receive a flow of 20 features, each of 32-bitsize, organized in 4-gram format. To meet these requirements, an enhanced version of the algorithm was developed and tested in Cprogramming. Then an equivalent design with a 5-stages pipelined architecture, and single instruction multiple data capabilities, was built in hardware to address the case. At the end, the proposed hardware found to be 65 times faster in term of its computational throughput compared to an existing design, and that with keeping the accuracy level as high as 94%, under the conditions of experiment carried.
format	Thesis
qualification_level	Master's degree
author	Al Hussein, Yahya Khaled
author_facet	Al Hussein, Yahya Khaled
author_sort	Al Hussein, Yahya Khaled
title	Hardware implementation of naive bayes classifier for malware detection
title_short	Hardware implementation of naive bayes classifier for malware detection
title_full	Hardware implementation of naive bayes classifier for malware detection
title_fullStr	Hardware implementation of naive bayes classifier for malware detection
title_full_unstemmed	Hardware implementation of naive bayes classifier for malware detection
title_sort	hardware implementation of naive bayes classifier for malware detection
granting_institution	Universiti Teknologi Malaysia
granting_department	Faculty of Engineering - School of Electrical Engineering
publishDate	2021
url	http://eprints.utm.my/id/eprint/96903/1/YahyaKhaledMSKE2021.pdf.pdf
_version_	1747818695757922304

Hardware implementation of naive bayes classifier for malware detection

Similar Items