Wirelength estimation in VLSI cell placement using machine learning techniques

In recent years, artificial intelligence (AI) plays an important role in Very Large-Scale Integration (VLSI) circuit design for wirelength prediction of cell placement. As compared to conventional wirelength estimation techniques such as Half-Perimeter Wirelength (HPWL) and Rectilinear Steiner Minim...

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Main Author:	Cheong, Zheng Quan
Format:	Thesis
Language:	English
Published:	2022
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/99381/1/CheongZhengQuanMSKE2022.pdf
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id	my-utm-ep.99381
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spelling	my-utm-ep.993812023-02-23T04:25:35Z Wirelength estimation in VLSI cell placement using machine learning techniques 2022 Cheong, Zheng Quan TK Electrical engineering. Electronics Nuclear engineering In recent years, artificial intelligence (AI) plays an important role in Very Large-Scale Integration (VLSI) circuit design for wirelength prediction of cell placement. As compared to conventional wirelength estimation techniques such as Half-Perimeter Wirelength (HPWL) and Rectilinear Steiner Minimal Tree (RSMT), wirelength prediction using AI does provide the results with higher accuracy within a shorter runtime. Therefore, this paper aims to implement and investigate the performance of several machine learning-based wirelength estimation models on the International Symposium on Physical Design (ISPD) 2011 circuit benchmark. Machine learning models such as Artificial Neural Network (ANN), Support Vector Machine (SVM) and Random Forest (RF), are introduced in this paper. Besides, this paper also targets to integrate the machine learning model with the best accuracy and runtime, into actual placement. The results indicate that RF is the best choice for replacement of conventional method as RF achieved an accuracy of more than 90% for wirelength estimation, and the runtime taken by RF is approximately 10000s much faster than RSMT. 2022 Thesis http://eprints.utm.my/id/eprint/99381/ http://eprints.utm.my/id/eprint/99381/1/CheongZhengQuanMSKE2022.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:149990 masters Universiti Teknologi Malaysia, Faculty of Engineering - School of Electrical Engineering Faculty of Engineering - School of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Cheong, Zheng Quan Wirelength estimation in VLSI cell placement using machine learning techniques
description	In recent years, artificial intelligence (AI) plays an important role in Very Large-Scale Integration (VLSI) circuit design for wirelength prediction of cell placement. As compared to conventional wirelength estimation techniques such as Half-Perimeter Wirelength (HPWL) and Rectilinear Steiner Minimal Tree (RSMT), wirelength prediction using AI does provide the results with higher accuracy within a shorter runtime. Therefore, this paper aims to implement and investigate the performance of several machine learning-based wirelength estimation models on the International Symposium on Physical Design (ISPD) 2011 circuit benchmark. Machine learning models such as Artificial Neural Network (ANN), Support Vector Machine (SVM) and Random Forest (RF), are introduced in this paper. Besides, this paper also targets to integrate the machine learning model with the best accuracy and runtime, into actual placement. The results indicate that RF is the best choice for replacement of conventional method as RF achieved an accuracy of more than 90% for wirelength estimation, and the runtime taken by RF is approximately 10000s much faster than RSMT.
format	Thesis
qualification_level	Master's degree
author	Cheong, Zheng Quan
author_facet	Cheong, Zheng Quan
author_sort	Cheong, Zheng Quan
title	Wirelength estimation in VLSI cell placement using machine learning techniques
title_short	Wirelength estimation in VLSI cell placement using machine learning techniques
title_full	Wirelength estimation in VLSI cell placement using machine learning techniques
title_fullStr	Wirelength estimation in VLSI cell placement using machine learning techniques
title_full_unstemmed	Wirelength estimation in VLSI cell placement using machine learning techniques
title_sort	wirelength estimation in vlsi cell placement using machine learning techniques
granting_institution	Universiti Teknologi Malaysia, Faculty of Engineering - School of Electrical Engineering
granting_department	Faculty of Engineering - School of Electrical Engineering
publishDate	2022
url	http://eprints.utm.my/id/eprint/99381/1/CheongZhengQuanMSKE2022.pdf
_version_	1776100594126159872

Wirelength estimation in VLSI cell placement using machine learning techniques

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