N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation

Nowadays malicious software, or commonly known as malwares, play a very critical role in almost every network intrusion attack that attempts to harm the connected devices. Thus, installing malware detection systems to protect the network environment has become even more imperative. Naïve Bayes class...

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Main Author:	Lee, Ming Yi
Format:	Thesis
Language:	English
Published:	2022
Subjects:	TK Electrical engineering Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/id/eprint/99512/1/LeeMingYiMSKE2022.pdf
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spelling	my-utm-ep.995122023-02-27T08:06:08Z N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation 2022 Lee, Ming Yi TK Electrical engineering. Electronics Nuclear engineering Nowadays malicious software, or commonly known as malwares, play a very critical role in almost every network intrusion attack that attempts to harm the connected devices. Thus, installing malware detection systems to protect the network environment has become even more imperative. Naïve Bayes classifier is a probabilistic supervised machine learning algorithm that can be launched on most general-purpose devices to solve a wide range of classification problems, including malware detection. Apart from the classifier, a good feature extractor is important to improve the performance and reliability of the classifier model. However, when it comes to real time applications, the general-purpose devices are limited in terms of their computational throughput. Therefore, the aim of this project is to implement n-gram feature extractor and Naïve Bayes classifier on hardware environments. To improve the throughput and latency of the malware detection, parallel processing capability of field-programmable gate array (FPGA) has been exploited whereby multiple processing units have been designed for the inference module to be implemented on the hardware. Besides, the inference module is designed to be pipelined with six stages. Other than that, hardware-friendly algorithms which have implemented base 2 logarithm transformation and floating-point to fixed-point conversion are used in this study. From the result, both software and hardware designs have obtained similar accuracy of 99.18% on the test dataset. Besides, it is found out that the higher number of parallel processing units, n in this design leads to higher throughput, resource utilization, power consumption, and energy efficiency for malware detection. Hardware design with n = 62 is the optimal design in this project, as it has achieved the highest value of throughput and energy efficiency at the same time. 2022 Thesis http://eprints.utm.my/id/eprint/99512/ http://eprints.utm.my/id/eprint/99512/1/LeeMingYiMSKE2022.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:150031 masters Universiti Teknologi Malaysia, Faculty of Engineering - School of Electrical Engineering Faculty of Engineering - School of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
language	English
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Lee, Ming Yi N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation
description	Nowadays malicious software, or commonly known as malwares, play a very critical role in almost every network intrusion attack that attempts to harm the connected devices. Thus, installing malware detection systems to protect the network environment has become even more imperative. Naïve Bayes classifier is a probabilistic supervised machine learning algorithm that can be launched on most general-purpose devices to solve a wide range of classification problems, including malware detection. Apart from the classifier, a good feature extractor is important to improve the performance and reliability of the classifier model. However, when it comes to real time applications, the general-purpose devices are limited in terms of their computational throughput. Therefore, the aim of this project is to implement n-gram feature extractor and Naïve Bayes classifier on hardware environments. To improve the throughput and latency of the malware detection, parallel processing capability of field-programmable gate array (FPGA) has been exploited whereby multiple processing units have been designed for the inference module to be implemented on the hardware. Besides, the inference module is designed to be pipelined with six stages. Other than that, hardware-friendly algorithms which have implemented base 2 logarithm transformation and floating-point to fixed-point conversion are used in this study. From the result, both software and hardware designs have obtained similar accuracy of 99.18% on the test dataset. Besides, it is found out that the higher number of parallel processing units, n in this design leads to higher throughput, resource utilization, power consumption, and energy efficiency for malware detection. Hardware design with n = 62 is the optimal design in this project, as it has achieved the highest value of throughput and energy efficiency at the same time.
format	Thesis
qualification_level	Master's degree
author	Lee, Ming Yi
author_facet	Lee, Ming Yi
author_sort	Lee, Ming Yi
title	N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation
title_short	N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation
title_full	N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation
title_fullStr	N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation
title_full_unstemmed	N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation
title_sort	n-gram feature extraction and naïve bayes classifier for malware detection using fpga implementation
granting_institution	Universiti Teknologi Malaysia, Faculty of Engineering - School of Electrical Engineering
granting_department	Faculty of Engineering - School of Electrical Engineering
publishDate	2022
url	http://eprints.utm.my/id/eprint/99512/1/LeeMingYiMSKE2022.pdf
_version_	1776100608658374656

N-gram feature extraction and Naïve Bayes classifier for malware detection using FPGA implementation

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