Implementation of fractal image compression on XPU architecture using intel oneAPI™ approach

Images are stored and processed on computers as collections of bits representing pixels or points forming the picture elements. Fractal Image Compression (FIC) is based on the search for self-similarity in the image, and it can provide a high compression rate to minimize the usage of memory. However...

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Main Author: Md. Dan, Mohammad Adib
Format: Thesis
Language:English
Published: 2022
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Online Access:http://eprints.utm.my/id/eprint/99539/1/MohammadAdibMdMSKE2022.pdf
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spelling my-utm-ep.995392023-02-28T07:44:08Z Implementation of fractal image compression on XPU architecture using intel oneAPI™ approach 2022 Md. Dan, Mohammad Adib TK Electrical engineering. Electronics Nuclear engineering Images are stored and processed on computers as collections of bits representing pixels or points forming the picture elements. Fractal Image Compression (FIC) is based on the search for self-similarity in the image, and it can provide a high compression rate to minimize the usage of memory. However, FIC Algorithm techniques take a long time to encode an image. It requires performing an enormous number of matching operations. To speed up the process, multiple improvements in terms of hardware and software have been done. This paper proposes another approach to support flexibility and portability for FIC implementation. Nowadays, there are diverse methods of fractal image compression. Most of the methods establish a commitment between fast coding, image quality, and compression rate. Nevertheless, these methods are difficult to be implemented due to several limitations. Thus, we will develop and implement FIC Algorithm on CPU, GPU, and FPGA based on a single source code. In this work, the implementation of the FIC Algorithm on XPU is using oneAPI™ base toolkit and its library. Furthermore, the framework was developed using the Data-Parallel C++ programming language (DPC++) and executed on diverse heterogeneous hardware architectures such as CPU, GPU, and FPGA. This approach achieves 52 times execution time speed-up between CPU and GPU implementation and significant improvement between targeted XPU architecture. 2022 Thesis http://eprints.utm.my/id/eprint/99539/ http://eprints.utm.my/id/eprint/99539/1/MohammadAdibMdMSKE2022.pdf application/pdf en public http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:149946 masters Universiti Teknologi Malaysia, Faculty of Engineering - School of Electrical Engineering Faculty of Engineering - School of Electrical Engineering
institution Universiti Teknologi Malaysia
collection UTM Institutional Repository
language English
topic TK Electrical engineering
Electronics Nuclear engineering
spellingShingle TK Electrical engineering
Electronics Nuclear engineering
Md. Dan, Mohammad Adib
Implementation of fractal image compression on XPU architecture using intel oneAPI™ approach
description Images are stored and processed on computers as collections of bits representing pixels or points forming the picture elements. Fractal Image Compression (FIC) is based on the search for self-similarity in the image, and it can provide a high compression rate to minimize the usage of memory. However, FIC Algorithm techniques take a long time to encode an image. It requires performing an enormous number of matching operations. To speed up the process, multiple improvements in terms of hardware and software have been done. This paper proposes another approach to support flexibility and portability for FIC implementation. Nowadays, there are diverse methods of fractal image compression. Most of the methods establish a commitment between fast coding, image quality, and compression rate. Nevertheless, these methods are difficult to be implemented due to several limitations. Thus, we will develop and implement FIC Algorithm on CPU, GPU, and FPGA based on a single source code. In this work, the implementation of the FIC Algorithm on XPU is using oneAPI™ base toolkit and its library. Furthermore, the framework was developed using the Data-Parallel C++ programming language (DPC++) and executed on diverse heterogeneous hardware architectures such as CPU, GPU, and FPGA. This approach achieves 52 times execution time speed-up between CPU and GPU implementation and significant improvement between targeted XPU architecture.
format Thesis
qualification_level Master's degree
author Md. Dan, Mohammad Adib
author_facet Md. Dan, Mohammad Adib
author_sort Md. Dan, Mohammad Adib
title Implementation of fractal image compression on XPU architecture using intel oneAPI™ approach
title_short Implementation of fractal image compression on XPU architecture using intel oneAPI™ approach
title_full Implementation of fractal image compression on XPU architecture using intel oneAPI™ approach
title_fullStr Implementation of fractal image compression on XPU architecture using intel oneAPI™ approach
title_full_unstemmed Implementation of fractal image compression on XPU architecture using intel oneAPI™ approach
title_sort implementation of fractal image compression on xpu architecture using intel oneapi™ approach
granting_institution Universiti Teknologi Malaysia, Faculty of Engineering - School of Electrical Engineering
granting_department Faculty of Engineering - School of Electrical Engineering
publishDate 2022
url http://eprints.utm.my/id/eprint/99539/1/MohammadAdibMdMSKE2022.pdf
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