Area-optimal cache coherent protocol for many-core network-on-chip

Cache coherence support is a major component in network-on-chip (NoC) systems which consist of multiple processing cores or elements as it is essential to ensure that the changes in shared memory are well communicated between all cores. Due to the nature and architecture of NoC, cache coherence prot...

Full description

Saved in:
Bibliographic Details
Main Author: Ng, Wai Kin
Format: Thesis
Language:English
Published: 2022
Subjects:
Online Access:http://eprints.utm.my/id/eprint/99547/1/NgWaiKinMSKE2022.pdf
Tags: Add Tag
No Tags, Be the first to tag this record!

Similar Items