http://www.loc.gov/mods/v3 http://www.loc.gov/standards/mods/v3/mods-3-2.xsd
Development of techniques for in-situ monitoring stress-induced degradation and potential solutions for FPGA
xvii, 128 leaves : illustrations (some colour) ; 30 cm
Ph.D. Jabatan Kejuruteraan Elektrik, Fakulti Kejuruteraan, Universiti Malaya 2022.