An accurate delay model for BiCMOS/CMOS logic gates /
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| Main Author: | |
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| Format: | Thesis Book |
| Language: | English |
| Published: |
1999
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| LEADER | 00681cam a2200205 a 4500 | ||
|---|---|---|---|
| 001 | u469669 | ||
| 003 | SIRSI | ||
| 008 | 000929s1999 si v 00 1 eng m | ||
| 035 | |a ACM-3332 | ||
| 040 | |a UMM | ||
| 090 | |a TK7 |b NUS 1999 Zhao | ||
| 100 | 1 | 0 | |a Zhao, Bin. |
| 245 | 1 | 2 | |a An accurate delay model for BiCMOS/CMOS logic gates / |c Zhao Bin. |
| 260 | |c 1999 | ||
| 300 | |a xiii, 124 leaves : |b ill. ; |c 30 cm. | ||
| 502 | |a Dissertation (M.Eng.) -- National University of Singapore, 1999. | ||
| 504 | |a Bibliography: leaves 116-124. | ||
| 948 | |a 02/10/2000 |b 29/10/2002 | ||
| 596 | |a 1 | ||
| 999 | |a TK7 NUS 1999 ZHAO |w LC |c 1 |i A509934727 |l B_KOM4 |m P01UTAMA |r Y |s Y |t TESIS |u 6/11/2002 |o .PUBLIC. bkom 4 : 45730 | ||