Parametric yield optimization for VLSI circuits /
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Main Author: | |
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Format: | Thesis Book |
Language: | English |
Published: |
2000.
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LEADER | 00754cam a2200229 a 4500 | ||
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001 | u503635 | ||
003 | SIRSI | ||
008 | 000929s2000 si v 00 1 eng m | ||
035 | |a ACV-5774 | ||
040 | |a UMM | ||
090 | |a TK7874.75 |b Che | ||
100 | 1 | 0 | |a Chen, Huiming. |
245 | 1 | 0 | |a Parametric yield optimization for VLSI circuits / |c Chen Huiming. |
260 | |c 2000. | ||
300 | |a xiv, 151 leaves : |b ill. ; |c 30 cm. | ||
502 | |a Thesis (Ph.D.) -- National University of Singapore, 2000. | ||
504 | |a Bibliography: leaves 138-144. | ||
650 | 0 | |a Integrated circuits |x Very large scale integration. | |
650 | 0 | |a Mathematical optimization. | |
948 | |a 27/08/2002 |b 30/07/2004 | ||
596 | |a 1 | ||
999 | |a TK7874.75 CHE |w LC |c 1 |i A510670063 |l STACKS |m P01UTAMA |r Y |s Y |t TESIS |u 3/8/2004 |