A VHDL implementation of BIST technique in UART design /
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| Main Author: | |
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| Format: | Thesis Book |
| Language: | English |
| Published: |
2002.
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| Subjects: | |
| Online Access: | http://studentsrepo.um.edu.my/id/eprint/2150 |
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| LEADER | 01181cam a2200277 a 4500 | ||
|---|---|---|---|
| 001 | u506460 | ||
| 003 | SIRSI | ||
| 008 | 990618s2002 my t 00 1 eng m | ||
| 035 | |a ACW-3079 | ||
| 040 | |a UMM | ||
| 090 | |a QA76 |b UM 2002 Mohyii | ||
| 100 | 0 | 0 | |a Mohd. Yamani Idna Idris. |
| 245 | 1 | 2 | |a A VHDL implementation of BIST technique in UART design / |c by Mohd. Yamani Idna bin Idris. |
| 260 | |c 2002. | ||
| 300 | |a x, 120 leaves : |b ill. ; |c 30 cm. | ||
| 502 | |a Dissertation (M.Comp.Sc.) -- Fakulti Sains Komputer dan Teknologi Maklumat, Universiti Malaya, 2003. | ||
| 504 | |a Bibliography: leaves 110-112. | ||
| 650 | 0 | |a VHDL (Computer hardware description language) | |
| 650 | 0 | |a Integrated circuits |x Design and construction. | |
| 710 | 2 | 0 | |a Universiti Malaya. |b Fakulti Sains Komputer dan Teknologi Maklumat. |
| 856 | |f IARC:A511969301 |z Click Here for Abstract and Table of Contents | ||
| 856 | 4 | 1 | |u http://studentsrepo.um.edu.my/id/eprint/2150 |
| 948 | |a 14/11/2002 |b 14/07/2004 | ||
| 596 | |a 1 16 | ||
| 999 | |a QA76 UM 2002 MOHYII |w LC |c 1 |i A510917074 |l STACKS |m P01UTAMA |r Y |s Y |t TESIS |u 11/8/2004 | ||
| 999 | |a QA76 UM 2002 MOHYII |w LC |c 1 |i A511730193 |l STACKS |m P16SKTM |r Y |s Y |t TESIS |u 4/10/2005 | ||