Poh, F. Y. W. (2002). Simulation of 0.1um Mos devices for logic and memory technologies.
Chicago Style (17th ed.) CitationPoh, Francis Yong Wee. Simulation of 0.1um Mos Devices for Logic and Memory Technologies. 2002.
MLA (8th ed.) CitationPoh, Francis Yong Wee. Simulation of 0.1um Mos Devices for Logic and Memory Technologies. 2002.
Warning: These citations may not always be 100% accurate.