FPGA co-processor design for lane detection and estimation /
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Main Author: | |
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Format: | Thesis Book |
Language: | English |
Published: |
2011.
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LEADER | 01098cam a2200289 a 4500 | ||
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001 | u844952 | ||
003 | SIRSI | ||
005 | 201111231530 | ||
008 | 111123s2011 my a t 000 0 eng m | ||
040 | |a UMM | ||
090 | |a QA76 |b UM 2011 Shao | ||
100 | 0 | |a Shariman Omar. | |
245 | 1 | 0 | |a FPGA co-processor design for lane detection and estimation / |c Shariman bin Omar. |
260 | |c 2011. | ||
300 | |a [3] xv, 176 leaves : |b ill. ; |c 30 cm. | ||
502 | |a Dissertation (M.Comp.Sc.) -- Fakulti Sains Komputer dan Teknologi Maklumat, Universiti Malaya, 2011. | ||
504 | |a Bibliography: leaves 154-162. | ||
650 | 0 | |a Field programmable gate arrays. | |
650 | 0 | |a Systems on a chip. | |
650 | 0 | |a Intelligent transportation systems. | |
650 | 0 | |a Electronics in navigation. | |
650 | 0 | |a Motor vehicles |x Automatic control. | |
650 | 0 | |a Motor vehicles |x Automatic location systems. | |
710 | 2 | |a Universiti Malaya. |b Fakulti Sains Komputer dan Teknologi Maklumat. | |
900 | |a NHS-ZA | ||
596 | |a 1 | ||
999 | |a QA76 UM 2011 SHAO |w LC |c 1 |i A514958303 |d 2/4/2012 |f 2/4/2012 |g 1 |l STACKS |m P01UTAMA |r Y |s Y |t TESIS |u 29/3/2012 |