Showing 1 - 20 results of 28 for search 'The Quietus~', query time: 3.41s Refine Results
  1. 1
    Automation scripts for generic synthesis and co-simulation for Xronos generated HDLs
    by Sulaiman, Khalil Asyrani
    Published 2016
    “... High-Level Synthesis (HLS) tools such as Altera Quartus and Synopsys Design Compiler. These coverages...”
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  2. 2
    A high speed 2D convolution hardware module for image processing applications in hardware
    by Baba, Beenal
    Published 2013
    “... is pursued. Verilog HDL is used to code the design; Quartus II tool is used for compilation and synthesis...”
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  3. 3
    Verilog modelling of Modbus TCP at 100 mbps
    by Tan, Zhe Jie
    Published 2022
    “... is coded in SystemVerilog and validation is done in Quartus ModelSim simulation. Running testbench...”
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  4. 4
    Network-on-chip network adapter
    by Sha’ari, Mohd. Farhan
    Published 2009
    “... them to destination core. NA is designed in Verilog hardware language using Altera Quartus II...”
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  5. 5
    Spam detection with genetic optimized artificial immune system
    by Mehrsina, Alireza
    Published 2013
    “... on broad range of engineering problem domains. This algorithm is quietly similar to Genetic Algorithm...”
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  6. 6
    Program control instruction class of x86 instruction set architecture compatible CPU
    by Ng, Teik Huat
    Published 2014
    “... using compiler tools such as Synopsys, Altera Quartus II and consume by the FPGAs, thereby reducing...”
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  7. 7
    USB soft core with altera Nios processor
    by Cheah, Chee Teong
    Published 2007
    “.... Besides this, Quartus II software is needed as the platform for the development of this project. USB...”
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  8. 8
    Systolic array architecture and its application in finite impulse response filter design
    by Kadir, Ezdiani Idayu
    Published 2013
    “... in Quartus II, the FIR filter was first designed and analyzed via MATLAB to obtain the filter coefficients...”
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  9. 9
    Field programmable gate array implementation for fault detection in a power transmission lines
    by Peh, Kok Guan
    Published 2010
    “... Quartus II tool....”
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  10. 10
    RTL implementation of one-sided jacobi algorithm for singular value decomposition
    by Wan Mohamad, Wan Ahmad Zainie
    Published 2016
    “... in SystemVerilog HDL, verification and synthesis using Quartus II and simulated on ModelSim-Altera. The original...”
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  11. 11
    The design of an FPGA-based sinusoidal pulse width modulation generator
    by Yunos, Mohamed Shaharudeen
    Published 2014
    “... SE 6.4 and the synthesis tool is Altera’s Quartus II Web Edition version 9.1. The proposed designs...”
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  12. 12
    Design of a neural network for FPGA implementation
    by Lim, Ee Ric
    Published 2013
    “... hardware module that can be applied or integrated into bigger hardware system. Altera Quartus II...”
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  13. 13
    FPGA implementation for fault detection on a power transmission lines
    by Omran, Ahmed Mohamed
    Published 2009
    “... Quartus II software and Nios II software the C++ code run in FPGA (DE2) board where the “oscillation...”
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  14. 14
    FPGA implementation of Image processing 2D convolution for spatial filter
    by Ng, Bee Yee
    Published 2012
    “...). Altera Quartus II compilation report shows the 2D convolution design acheieves fmax as high as 394MHz...”
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  15. 15
    Verilog design of input/output processor with built-in-self-test
    by Goh, Keng Hoo
    Published 2007
    “... language at register transfer level (RTL), synthesized using Altera Quartus II using FPFA device from APEC...”
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  16. 16
    Design and implementation of OFDM transmitter and receiver on FPGA hardware
    by Kadiran, Kamaru Adzha
    Published 2005
    “... FPGA Express, Altera Maxplus+II and Altera Quartus 3.0. Software tools are used to assist the design...”
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  17. 17
    Adaptive proportional-integral-derivative controller on field programmable gate array
    by Ee Luan, Prak Yut
    Published 2016
    “... and reducing the overshoot, undershoot, settling time and ringing. The Altera Quartus and Altera ModelSim...”
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  18. 18
    Functional test generation using micro operation fault model
    by Ong, Hui Yien
    Published 2011
    “.... For verification purpose, these test patterns were validated by simulating the circuit using Altera Quartus II tool...”
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  19. 19
    Finite impulse response filter design on distributed arithmetic architecture
    by Abu Zaharin, Muhamad Iqbal
    Published 2012
    “... is structured in Verilog code and synthesized using Altera QuartusII version 11. The timing simulation...”
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  20. 20
    Light-emitting diode driver for lighting application using field programmable gate array
    by Nazarudin, Muhammad Syazani
    Published 2018
    “... with Quartus II software using Verilog hardware description language. The power stage schematic and printed...”
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