Hiew, F. S. (2006). Design Allocation And Scheduling Hardware Compiler For Digital Data Processing In FPGA.
Chicago Style (17th ed.) CitationHiew, Fu San. Design Allocation And Scheduling Hardware Compiler For Digital Data Processing In FPGA. 2006.
MLA引文Hiew, Fu San. Design Allocation And Scheduling Hardware Compiler For Digital Data Processing In FPGA. 2006.
警告:這些引文格式不一定是100%准確.