Hiew, F. S. (2006). Design Allocation And Scheduling Hardware Compiler For Digital Data Processing In FPGA.
Chicago Style (17th ed.) CitationHiew, Fu San. Design Allocation And Scheduling Hardware Compiler For Digital Data Processing In FPGA. 2006.
MLA (8th ed.) CitationHiew, Fu San. Design Allocation And Scheduling Hardware Compiler For Digital Data Processing In FPGA. 2006.
Warning: These citations may not always be 100% accurate.