VLSI Design Of A Bit Serial Arithmetic Logic Unit

The arithmetic logic unit (ALU) is designed to perform bit serial operation on two 8 bits input. In this project , a Very High Speed Integrated Circuit Hardware Description Language (VHDL) code is written using the Altera MAX+Plus II environment to design, compile and simulate for each operation in...

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主要作者: Lee, Tiong Kiat
格式: Thesis
出版: 2003
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spelling my-mmu-ep.9662010-07-15T06:38:54Z VLSI Design Of A Bit Serial Arithmetic Logic Unit 2003-04 Lee, Tiong Kiat TK7800-8360 Electronics The arithmetic logic unit (ALU) is designed to perform bit serial operation on two 8 bits input. In this project , a Very High Speed Integrated Circuit Hardware Description Language (VHDL) code is written using the Altera MAX+Plus II environment to design, compile and simulate for each operation in the bit serial arithmetic logic unit. The details of each design steps from design entry, compilation, debugging, simulation and syntheis is described in this project. 2003-04 Thesis http://shdl.mmu.edu.my/966/ http://myto.perpun.net.my/metoalogin/logina.php masters Multimedia University Research Library
institution Multimedia University
collection MMU Institutional Repository
topic TK7800-8360 Electronics
spellingShingle TK7800-8360 Electronics
Lee, Tiong Kiat
VLSI Design Of A Bit Serial Arithmetic Logic Unit
description The arithmetic logic unit (ALU) is designed to perform bit serial operation on two 8 bits input. In this project , a Very High Speed Integrated Circuit Hardware Description Language (VHDL) code is written using the Altera MAX+Plus II environment to design, compile and simulate for each operation in the bit serial arithmetic logic unit. The details of each design steps from design entry, compilation, debugging, simulation and syntheis is described in this project.
format Thesis
qualification_level Master's degree
author Lee, Tiong Kiat
author_facet Lee, Tiong Kiat
author_sort Lee, Tiong Kiat
title VLSI Design Of A Bit Serial Arithmetic Logic Unit
title_short VLSI Design Of A Bit Serial Arithmetic Logic Unit
title_full VLSI Design Of A Bit Serial Arithmetic Logic Unit
title_fullStr VLSI Design Of A Bit Serial Arithmetic Logic Unit
title_full_unstemmed VLSI Design Of A Bit Serial Arithmetic Logic Unit
title_sort vlsi design of a bit serial arithmetic logic unit
granting_institution Multimedia University
granting_department Research Library
publishDate 2003
_version_ 1747829274735280128