Development of low power viterbi decoder on complex programmable logic device platform
Space Time Trellis Code (STTC) and Viterbi algorithm combinations are known to offer a robust forward error correction system. This especially has been used in a noisy digital communication system such as wireless communication. A traditional Viterbi decoder would contain three main units; Bra...
Saved in:
| Main Author: | |
|---|---|
| Format: | Thesis |
| Language: | English |
| Published: |
2018
|
| Subjects: | |
| Online Access: | http://psasir.upm.edu.my/id/eprint/71391/1/FK%202018%2089%20IR.pdf |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|