Toh , Y. F. (2017). A Test Vector Minimization Algorithm Based On Delta Debugging For Post-Silicon Validation Of Pcie Rootport.
Chicago Style (17th ed.) CitationToh , Yi Feng. A Test Vector Minimization Algorithm Based On Delta Debugging For Post-Silicon Validation Of Pcie Rootport. 2017.
MLA (8th ed.) CitationToh , Yi Feng. A Test Vector Minimization Algorithm Based On Delta Debugging For Post-Silicon Validation Of Pcie Rootport. 2017.
Warning: These citations may not always be 100% accurate.