Toh , Y. F. (2017). A Test Vector Minimization Algorithm Based On Delta Debugging For Post-Silicon Validation Of Pcie Rootport.
Chicago Style (17th ed.) CitationToh , Yi Feng. A Test Vector Minimization Algorithm Based On Delta Debugging For Post-Silicon Validation Of Pcie Rootport. 2017.
MLA引文Toh , Yi Feng. A Test Vector Minimization Algorithm Based On Delta Debugging For Post-Silicon Validation Of Pcie Rootport. 2017.
警告:這些引文格式不一定是100%准確.