A Cost And Power Efficient Ddr4/Gddr5x/Gddr5 Transmitter With 3-Tap Equalizer
The demand on memory bandwidth has been increasing due to the rapid development in graphics intensive applications and big data analytics. Limited of the I/O and thermal densities, widening of data bus is no longer a feasible option for increasing memory bandwidth. Therefore, high-speed DDR transmit...
Saved in:
Main Author: | Ng , Hoong Chin |
---|---|
Format: | Thesis |
Language: | English |
Published: |
2016
|
Subjects: | |
Online Access: | http://eprints.usm.my/41304/1/NG_HOONG_CHIN_24_Pages.pdf |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
Design And Development Of Microwave Transmitter For L-Band Scatterometer
by: Hii, William How Hsin
Published: (2006) -
Design Of CMOS Power Amplifier For Ultra-Wideband (UWB) Transmitter
by: Mohd Hassan, Siti Maisurah
Published: (2008) -
FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
by: Ahmad, Nabihah @ Nornabihah
Published: (2005) -
Design Of Multiply-By-Two Amplifier For 1.5 Bit Pipelined Analogue-To-Digital Converter Application
by: Teng , Jin Chung
Published: (2014) -
Structural And Optical Studies Of Wide Band-Gap AlxGa1-xN (0 ≤ x ≤ 1) Semiconductors [TK7871.85. N577 2007 f rb].
by: Ng, Sha Shiong
Published: (2007)