Development Of Spacer Free Self-Aligned Contact Implantation For Power Devices
Mengoptimasi skema proses integrasi bagi sesebuah teknolgi merupakan salah satu faktor penting untuk mengurangkan bilangan kecatatan dan kitaran masa dalam bidang fabrikasi wafer. Dalam pengajian sarjana ini, aliran proses yang dioptimasi bagi menjajarkan penimpalan kontak telah dikaji bagi teknolog...
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my-usm-ep.417842019-04-12T05:27:00Z Development Of Spacer Free Self-Aligned Contact Implantation For Power Devices 2009-11 Poobalan, Banu TN1-997 Mining engineering. Metallurgy Mengoptimasi skema proses integrasi bagi sesebuah teknolgi merupakan salah satu faktor penting untuk mengurangkan bilangan kecatatan dan kitaran masa dalam bidang fabrikasi wafer. Dalam pengajian sarjana ini, aliran proses yang dioptimasi bagi menjajarkan penimpalan kontak telah dikaji bagi teknologi Infineoen CoolMOS. Selepas mengaji 3 idea yang berlainan dengan insentif, konsep yang paling berpotensi tinggi dipilih bagi pengoptimasian dan pencirian lanjutan di peringkat wafer dan poduk. Optimization of the process integration scheme for a technology is one of the key factors within wafer fabrication in order to reduce defect density and production cycle time. Within this master study, an optimized process flow for the self-aligned contact implantation was evaluated for the Infineons CoolMOS technology. After intensive feasibility investigations of 3 different ideas, the most promising concept was further optimized and characterized on wafer level as well as in the final product. 2009-11 Thesis http://eprints.usm.my/41784/ http://eprints.usm.my/41784/1/Banu_AP_Poobalan24.pdf application/pdf en public masters Universiti Sains Malaysia Pusat Pengajian Kejuruteraan Bahan & Sumber Mineral |
institution |
Universiti Sains Malaysia |
collection |
USM Institutional Repository |
language |
English |
topic |
TN1-997 Mining engineering Metallurgy |
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TN1-997 Mining engineering Metallurgy Poobalan, Banu Development Of Spacer Free Self-Aligned Contact Implantation For Power Devices |
description |
Mengoptimasi skema proses integrasi bagi sesebuah teknolgi merupakan salah satu faktor penting untuk mengurangkan bilangan kecatatan dan kitaran masa dalam bidang fabrikasi wafer. Dalam pengajian sarjana ini, aliran proses yang dioptimasi bagi menjajarkan penimpalan kontak telah dikaji bagi teknologi Infineoen CoolMOS. Selepas mengaji 3 idea yang berlainan dengan insentif, konsep yang paling berpotensi tinggi dipilih bagi pengoptimasian dan pencirian lanjutan di peringkat wafer dan poduk.
Optimization of the process integration scheme for a technology is one of the key factors within wafer fabrication in order to reduce defect density and production cycle time. Within this master study, an optimized process flow for the self-aligned contact implantation was evaluated for the Infineons CoolMOS technology. After intensive feasibility investigations of 3 different ideas, the most promising concept was further optimized and characterized on wafer level as well as in the final product. |
format |
Thesis |
qualification_level |
Master's degree |
author |
Poobalan, Banu |
author_facet |
Poobalan, Banu |
author_sort |
Poobalan, Banu |
title |
Development Of Spacer Free
Self-Aligned Contact Implantation For Power Devices
|
title_short |
Development Of Spacer Free
Self-Aligned Contact Implantation For Power Devices
|
title_full |
Development Of Spacer Free
Self-Aligned Contact Implantation For Power Devices
|
title_fullStr |
Development Of Spacer Free
Self-Aligned Contact Implantation For Power Devices
|
title_full_unstemmed |
Development Of Spacer Free
Self-Aligned Contact Implantation For Power Devices
|
title_sort |
development of spacer free
self-aligned contact implantation for power devices |
granting_institution |
Universiti Sains Malaysia |
granting_department |
Pusat Pengajian Kejuruteraan Bahan & Sumber Mineral |
publishDate |
2009 |
url |
http://eprints.usm.my/41784/1/Banu_AP_Poobalan24.pdf |
_version_ |
1747820969590784000 |