Study Of The Relationship Between Delta Delay And Adjacent Parallel Wire Length In 45 Nanometer Process Technology

Hierarchical design spans the complete framework of a design flow from Register Transfer Level (RTL), synthesis, place and route, timing closure and various other analyses before sign-off. Finer geometries and increasing interconnect density however have resulted signal integrity becoming the key is...

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Bibliographic Details
Main Author: Mohamed, Shamsul Anuar
Format: Thesis
Language:English
Published: 2014
Subjects:
Online Access:http://eprints.usm.my/46237/1/Shamsul%20Anuar%20Bin%20Mohamed24.pdf
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