Simulation, fabrication and characterization of NMOS transistor
This thesis explains the recipe module development for the first Long Channel NMOS transistor device fabrication process at cleanroom laboratory of KUiTTHO. A recipe for the NMOS transistor fabrication process has been successfully produced. Threshold Voltage and Leakage Current, with different cha...
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| 主要作者: | |
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| 格式: | Thesis |
| 語言: | English English English |
| 出版: |
2006
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| 主題: | |
| 在線閱讀: | http://eprints.uthm.edu.my/2223/1/DAMHUJI%20B.%20RIFAI%20-%20declaration.pdf http://eprints.uthm.edu.my/2223/2/DAMHUJI%20B.%20RIFAI%20-%2024p.pdf http://eprints.uthm.edu.my/2223/3/DAMHUJI%20B.%20RIFAI%20-%20fulltext.pdf |
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| 總結: | This thesis explains the recipe module development for the first Long
Channel NMOS transistor device fabrication process at cleanroom laboratory of KUiTTHO. A recipe for the NMOS transistor fabrication process has been successfully produced. Threshold Voltage and Leakage Current, with different channel length and oxide gate for the Long Channel NMOS transistor too has been investigated. The data from the experiment conducted have shown that the threshold voltage is more influenced by the thickness of the oxide gate as compared with the
channel length. The threshold voltage increased in linear form with the increase of the oxide gate thickness; and there is almost no change for different channel length. Leakage Current reduces exponentially with the increase of the oxide gate thickness and the channel length. |
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