Modified pattern generator of built-in self test for sequential circuits with reduced test time

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主要作者:	Muhamad Amin, Muhamad Ridzuan Radin
格式:	Thesis
出版:	2011
主题:	TK Electrical engineering Electronics Nuclear engineering
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id	my-utm-ep.26858
record_format	uketd_dc
spelling	my-utm-ep.268582017-07-10T07:19:55Z Modified pattern generator of built-in self test for sequential circuits with reduced test time 2011 Muhamad Amin, Muhamad Ridzuan Radin TK Electrical engineering. Electronics Nuclear engineering 2011 Thesis http://eprints.utm.my/id/eprint/26858/ http://libraryopac.utm.my/client/en_AU/main/search/results?qu=Modified+pattern+generator+of+built-in+self+test+for+sequential+circuits+with+reduced+test+time&te= masters Universiti Teknologi Malaysia, Faculty of Electrical Engineering Faculty of Electrical Engineering
institution	Universiti Teknologi Malaysia
collection	UTM Institutional Repository
topic	TK Electrical engineering Electronics Nuclear engineering
spellingShingle	TK Electrical engineering Electronics Nuclear engineering Muhamad Amin, Muhamad Ridzuan Radin Modified pattern generator of built-in self test for sequential circuits with reduced test time
description
format	Thesis
qualification_level	Master's degree
author	Muhamad Amin, Muhamad Ridzuan Radin
author_facet	Muhamad Amin, Muhamad Ridzuan Radin
author_sort	Muhamad Amin, Muhamad Ridzuan Radin
title	Modified pattern generator of built-in self test for sequential circuits with reduced test time
title_short	Modified pattern generator of built-in self test for sequential circuits with reduced test time
title_full	Modified pattern generator of built-in self test for sequential circuits with reduced test time
title_fullStr	Modified pattern generator of built-in self test for sequential circuits with reduced test time
title_full_unstemmed	Modified pattern generator of built-in self test for sequential circuits with reduced test time
title_sort	modified pattern generator of built-in self test for sequential circuits with reduced test time
granting_institution	Universiti Teknologi Malaysia, Faculty of Electrical Engineering
granting_department	Faculty of Electrical Engineering
publishDate	2011
_version_	1747815528113635328

Modified pattern generator of built-in self test for sequential circuits with reduced test time

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