Reconfigurable address generation unit for 2D correlation in FPGA
2D correlation has been commonly used in image processing. In general, performance of the 2D correlation function depends on its processing speed, memory speed as well as address calculation speed. As the processing and memory speed increase, the address calculation speed becomes bottleneck for over...
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| Main Author: | |
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| Format: | Thesis |
| Language: | English |
| Published: |
2012
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/32474/1/HengAiHoonMFKE2012.pdf |
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