Alawey, S. Z. (2014). Gate oxide short (gos) defect modeling based on 32 nm CMOS process.
Chicago Style (17th ed.) CitationAlawey, Sahar Z. Gate Oxide Short (gos) Defect Modeling Based on 32 Nm CMOS Process. 2014.
MLA (8th ed.) CitationAlawey, Sahar Z. Gate Oxide Short (gos) Defect Modeling Based on 32 Nm CMOS Process. 2014.
Warning: These citations may not always be 100% accurate.